Systems and methods for compensating a phase of a local clock of a storage device

• US 9,025,715 B1
• Filed: 03/20/2014
• Issued: 05/05/2015
• Est. Priority Date: 10/09/2002
• Status: Expired due to Fees

• Current Assignee: Marvell World Trade Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell World Trade Limited (Marvell Technology Group Limited)
• Inventors: Sutioso, Henri, Wu, Lei
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US14/220,523
• Time in Patent Office: 411 Days
• Field of Search: 375/326, 375/327, 375/354, 375/358, 375/373, 375/376, 327/147, 327/156
• US Class Current: 375/358
• CPC Class Codes: G06F 1/10 Distribution of clock signals , e.g. skew
• CPC Class Codes: H03L 7/081 provided with an additional controlled phase shifter H03L7/0998 takes precedence
• CPC Class Codes: H03L 7/197 a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division H03L7/1806 takes precedence
• CPC Class Codes: H04L 7/0337 Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Abstract

A storage device configured to communicate with a host according to a serial communication standard. The storage device includes a receiver configured to receive host data from the host; a clock data recovery circuit configured to determine a first frequency of host data transmitted by a host; a phase locked loop configured to generate a local phase corresponding to a local clock signal; a frequency offset calculator configured to generate a frequency offset corresponding to the first frequency and a second frequency of the local clock signal; an accumulator configured to generate a phase offset corresponding to a difference between the local phase and a phase of the host data; an interpolator configured to generate a compensated local clock signal using the phase offset and the local phase; and a transmitter configured to transmit device data to the host using the compensated local clock signal.

Claims

1. A storage device configured to communicate with a host according to a serial communication standard, the storage device comprising:

a receiver configured to receive host data transmitted by the host, wherein the host data is transmitted by the host using a first clock generator having a first accuracy;

a clock data recovery circuit configured to determine a first frequency of the host data transmitted by the host;

a phase locked loop configured to generate a local phase corresponding to a local clock signal, wherein the local clock signal is generated by a second clock generator having a second accuracy that is less than the first accuracy;

a frequency offset calculator configured to generate, based on the first frequency of the host data transmitted by the host and the local phase corresponding to the local clock signal, a frequency offset corresponding to a difference between (i) the first frequency of the host data transmitted by the host and (ii) a second frequency of the local clock signal;

an accumulator configured to generate a phase offset based on the frequency offset, wherein the phase offset corresponds to a difference between (i) the local phase corresponding to the local clock signal and (ii) a phase corresponding to the host data transmitted by the host;

an interpolator configured to

(i) receive, from the phase locked loop, the local phase corresponding to the local clock signal,

(ii) receive, from the accumulator, the phase offset, and

(iii) generate a compensated local clock signal based on the phase offset and the local phase corresponding to the local clock signal; and

a transmitter configured to transmit device data to the host in accordance with the compensated local clock signal.

2. The storage device of claim 1, wherein the host corresponds to a storage device controller.

3. The storage device of claim 1, wherein the storage device receives the host data from the host and transmits the device data to the host via a serial advanced technology attachment medium.

4. The storage device of claim 1, further comprising a low pass filter connected between the frequency offset calculator and the accumulator, the low pass filter configured to filter the frequency offset.

5. The storage device of claim 1, further comprising:

a frequency modulation generator configured to selectively provide, as an output, either a constant signal or a spread spectrum modulation signal based on a spread spectrum control signal; and

a summer configured to (i) sum the output of the frequency modulation generator with the frequency offset and (ii) provide the sum to the accumulator as the frequency offset.

6. The storage device of claim 5, wherein the frequency modulation generator is further configured to provide, as the output, (i) the constant signal when spread spectrum operation is disabled in accordance with the spread spectrum control signal and (ii) the spread spectrum modulation signal when the spread spectrum operation is enabled in accordance with the spread spectrum control signal.

7. The storage device of claim 5, wherein the output of the frequency modulation generator compensates the second frequency of the local clock signal.

8. The storage device of claim 5, wherein the phase locked loop comprises:

a reference frequency generator;

a phase detector in communication with the reference frequency generator;

a low pass filter in communication with the phase detector; and

a voltage controlled oscillator in communication with the low pass filter.

9. The storage device of claim 8, wherein the reference frequency generator comprises a crystal resonator or a ceramic resonator.

10. The storage device of claim 8, wherein the phase locked loop further comprises:

a 1/N divider having (i) an input in communication with the voltage controlled oscillator and (ii) an output in communication with the phase detector; and

a 1/M divider having (i) an input in communication with the reference frequency generator and (ii) an output in communication with the phase detector, wherein N and M are numerical values that are adjusted to create the spread spectrum modulation signal when spread spectrum operation is enabled.

11. A method for operating a storage device configured to communicate with a host according to a serial communication standard, the method comprising:

receiving host data transmitted by the host, wherein the host data is transmitted by the host using a first clock generator having a first accuracy;

determining a first frequency of the host data transmitted by the host;

generating a local phase corresponding to a local clock signal, wherein the local clock signal is generated by a second clock generator having a second accuracy that is less than the first accuracy;

generating, based on the first frequency of the host data transmitted by the host and the local phase corresponding to the local clock signal, a frequency offset corresponding to a difference between (i) the first frequency of the host data transmitted by the host and (ii) a second frequency of the local clock signal;

generating a phase offset based on the frequency offset, wherein the phase offset corresponds to a difference between (i) the local phase corresponding to the local clock signal and (ii) a phase corresponding to the host data transmitted by the host;

generating a compensated local clock signal based on the phase offset and the local phase corresponding to the local clock signal; and

transmitting device data to the host in accordance with the compensated local clock signal.

12. The method of claim 11, wherein the host corresponds to a storage device controller.

13. The method of claim 11, wherein:

receiving the host data from the host includes receiving the host data from the host via a serial advanced technology attachment medium; and

transmitting the device data to the host includes transmitting the device data to the host via the serial advanced technology attachment medium.

14. The method of claim 11, further comprising filtering the frequency offset.

15. The method of claim 11, further comprising:

selectively providing, as an output, either a constant signal or a spread spectrum modulation signal based on a spread spectrum control signal; and

summing the output with the frequency offset and providing the sum as the frequency offset.

16. The method of claim 15, further comprising providing, as the output, (i) the constant signal when spread spectrum operation is disabled in accordance with the spread spectrum control signal and (ii) the spread spectrum modulation signal when the spread spectrum operation is enabled in accordance with the spread spectrum control signal.

17. The method of claim 15, wherein the output compensates the second frequency of the local clock signal.