Data compression for direct memory access transfers
First Claim
1. A computer system, comprising:
- a data processor and memory accessible by the data processor, the memory storing a data set; and
a direct memory access (DMA) controller in communication with the data processor, the DMA controller comprising circuitry to control movement of the data set from a first element of the memory to a second element of the memory, where the second element of the memory has an access latency for accesses by the DMA controller that is longer than that of the first element of the memory, the data processor provides parameters via a DMA descriptor for a data compression procedure by the DMA controller, the parameters including an identifier of the data set to be moved and parameters identifying characteristics of the data compression procedure, the DMA controller including logic to perform data compression according to the parameters identifying the characteristics of the data compression procedure on the data set in the first element of the memory to form a compressed data set, and to store the compressed data set and parameters identifying characteristics of the compressed data set in the second element of the memory,wherein the data compression procedure produces one or more packets of compressed data of the compressed data set, wherein the parameters include indicators of a number of packets and a number of samples per packet in the compressed data set.
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Accused Products
Abstract
Memory system operations are extended for a data processor by DMA, cache, or memory controller to include a DMA descriptor, including a set of operations and parameters for the operations, which provides for data compression and decompression during or in conjunction with processes for moving data between memory elements of the memory system. The set of operations can be configured to use the parameters and perform the operations of the DMA, cache, or memory controller. The DMA, cache, or memory controller can support moves between memory having a first access latency, such as memory integrated on the same chip as a processor core, and memory having a second access latency that is longer than the first access latency, such as memory on a different integrated circuit than the processor core.
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Citations
50 Claims
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1. A computer system, comprising:
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a data processor and memory accessible by the data processor, the memory storing a data set; and a direct memory access (DMA) controller in communication with the data processor, the DMA controller comprising circuitry to control movement of the data set from a first element of the memory to a second element of the memory, where the second element of the memory has an access latency for accesses by the DMA controller that is longer than that of the first element of the memory, the data processor provides parameters via a DMA descriptor for a data compression procedure by the DMA controller, the parameters including an identifier of the data set to be moved and parameters identifying characteristics of the data compression procedure, the DMA controller including logic to perform data compression according to the parameters identifying the characteristics of the data compression procedure on the data set in the first element of the memory to form a compressed data set, and to store the compressed data set and parameters identifying characteristics of the compressed data set in the second element of the memory, wherein the data compression procedure produces one or more packets of compressed data of the compressed data set, wherein the parameters include indicators of a number of packets and a number of samples per packet in the compressed data set. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A computer system, comprising:
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a data processor and memory accessible by the data processor, the memory storing a data set; and a direct memory access (DMA) controller in communication with the data processor, the DMA controller comprising circuitry to control movement of the data set from a first element of the memory to a second element of the memory, where the second element of the memory has an access latency for accesses by the DMA controller that is longer than that of the first element of the memory, the data processor provides parameters via a DMA descriptor for a data compression procedure by the DMA controller, the parameters including an identifier of the data set to be moved and parameters identifying characteristics of the data compression procedure, the DMA controller including logic to perform data compression according to the parameters identifying the characteristics of the data compression procedure on the data set in the first element of the memory to form a compressed data set, and to store the compressed data set and parameters identifying characteristics of the compressed data set in the second element of the memory, wherein the data processor provides parameters via a decompression DMA descriptor for a data decompression procedure by the DMA controller, the decompression DMA descriptor parameters including an identifier of the data set to be moved, an indicator of a compressed data set location in the second element of memory, and an indicator of a decompressed data set location in the first element of memory, the DMA controller including logic, to perform data decompression according to identified characteristics of the data decompression procedure on the compressed data set in the second element of the memory to form a decompressed data set, and to store the decompressed data set in the first element of the memory. - View Dependent Claims (20, 21, 22, 23)
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24. A method for transferring a data set between a first element of a memory and a second element of the memory comprising:
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initiating a data compression procedure in a direct memory access (DMA) controller in communication with a data processor and the memory, where the second element of the memory has an access latency for accesses by the DMA controller that is longer than that of the first element of the memory; passing an identifier of an uncompressed data set in the first element of the memory from the data processor to the DMA controller; passing parameters identifying characteristics of a data compression procedure to be applied to the uncompressed data set from the data processor to the DMA controller; retrieving the uncompressed data set from the first element of the memory in accordance with the identifier; compressing the uncompressed data set according to the identified characteristics of the data compression procedure to form a compressed data set; and storing the compressed data set in the second element of the memory, wherein said compressing produces one or more packets of compressed data of the compressed data set, wherein the parameters include indicators of a number of packets and a number of samples per packet in the compressed data set. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44)
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45. A method for transferring a data set between a first element of a memory and a second element of the memory comprising:
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initiating a data compression procedure in a direct memory access (DMA) controller in communication with a data processor and the memory, where the second element of the memory has an access latency for accesses by the DMA controller that is longer than that of the first element of the memory; passing an identifier of an uncompressed data set in the first element of the memory from the data processor to the DMA controller; passing parameters identifying characteristics of a data compression procedure to be applied to the uncompressed data set from the data processor to the DMA controller; retrieving the uncompressed data set from the first element of the memory in accordance with the identifier; compressing the uncompressed data set according to the identified characteristics of the data compression procedure to form a compressed data set; storing the compressed data set in the second element of the memory; and transferring a compressed data set to be decompressed from the second element to the first element of the memory, comprising; initiating a data decompression procedure in the DMA controller; passing an identifier of the compressed data set to be decompressed from the data processor to the DMA controller; retrieving the compressed data set from the second element of the memory in accordance with the identifier of the compressed data set to be decompressed; retrieving a parameter identifying at least one characteristic of a data decompression procedure from the second element of the memory; decompressing the compressed data set according to the identified characteristic of the data decompression procedure to produce a decompressed data set; and storing the decompressed data set in the first element of the memory. - View Dependent Claims (46, 47, 48, 49, 50)
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Specification