Achieving ultra-high availability using a single CPU
First Claim
Patent Images
1. A system comprising:
- a memory, wherein a first portion of the memory is allocated to a first partition and a second portion of the memory is allocated to a second partition; and
a processor comprising a plurality of cores, wherein a first set of one or more cores from the plurality of cores is allocated to the first partition and a second set of one or more cores from the plurality of cores is allocated to the second partition;
wherein the first partition is configured to operate in a first mode and perform a function in the first mode;
wherein the second partition is configured to operate in a second mode when the first partition is operating in the first mode, the second mode being different from the first mode, wherein the function performed in the first mode is not performed by the second partition when operating in the second mode;
wherein the second partition is configured to start operating in the first mode instead of the second mode and to perform the function; and
wherein the first partition is configured to operate in the second mode when the second partition is operating in the first mode and the function is not performed by the first partition when operating in the second mode.
2 Assignments
0 Petitions
Accused Products
Abstract
Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.
261 Citations
20 Claims
-
1. A system comprising:
-
a memory, wherein a first portion of the memory is allocated to a first partition and a second portion of the memory is allocated to a second partition; and a processor comprising a plurality of cores, wherein a first set of one or more cores from the plurality of cores is allocated to the first partition and a second set of one or more cores from the plurality of cores is allocated to the second partition; wherein the first partition is configured to operate in a first mode and perform a function in the first mode; wherein the second partition is configured to operate in a second mode when the first partition is operating in the first mode, the second mode being different from the first mode, wherein the function performed in the first mode is not performed by the second partition when operating in the second mode; wherein the second partition is configured to start operating in the first mode instead of the second mode and to perform the function; and wherein the first partition is configured to operate in the second mode when the second partition is operating in the first mode and the function is not performed by the first partition when operating in the second mode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A method comprising:
-
causing, in a system comprising a processor providing a plurality of cores, a first set of one or more cores from the plurality of cores to be allocated to a first partition and a second set of one or more cores from the plurality of cores to be allocated to a second partition; operating the first partition in a first mode; performing, by the first partition, a function performed in the first mode; operating the second partion in a second mode, wherein the function is not performed by the second partition when operating in the second mode; and causing the second partition to start operating in the first mode instead of the second mode; performing, by the second partition, the function when the second partition operates in the first mode; and causing the first partition to operate in the second mode when the second partition is operating in the first mode. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
-
-
19. A non-transitory computer-readable medium storing a plurality of instructions for execution by a system comprising a processor, the processor comprising a plurality of cores, the plurality of instructions comprising:
-
instructions that cause a first partition to operate in a first mode, the first partition allocated a first set of cores from the plurality of cores, wherein a function is performed in the first mode; instructions that cause a second partition to operate in a second mode when the first partition is operating in the first mode, wherein the function is not performed in the second mode, the second partition allocated a second set of cores from the plurality of cores; instructions that, in response to an event, cause; the second partition to start operating in the first mode instead of the second mode and to perform the function; and the first partition to operate in the second mode when the second partition operates in the first mode. - View Dependent Claims (20)
-
Specification