Method, system and apparatus for providing access to error correction information

• US 9,026,888 B2
• Filed: 12/21/2012
• Issued: 05/05/2015
• Est. Priority Date: 12/21/2012
• Status: Active Grant

• Current Assignee: SK Hynix NAND Product Solutions Corporation (SK Hynix Inc.)
• Original Assignee: Intel Corporation
• Inventors: Kwok, Zion S.
• Primary Examiner(s): Merant, Guerrier
• Application Number:
  US13/725,809
• Publication Number:
  US 20140181615A1
• Time in Patent Office: 865 Days
• US Class Current: 714/763
• CPC Class Codes: G06F 11/00 Error detection; Error correction; Monitoring error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00
• CPC Class Codes: G06F 11/1012 using codes or arrangements adapted for a specific type of error G06F11/1048 takes precedence
• CPC Class Codes: H03M 13/095 Error detection codes other than CRC and single parity bit codes
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/152 Bose-Chaudhuri-Hocquenghem [BCH] codes
• CPC Class Codes: H03M 13/19 Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
• CPC Class Codes: H03M 13/2906 using block codes H03M13/2957 takes precedence

Abstract

Techniques and mechanisms to facilitate data error detection by a memory controller. In an embodiment, the memory controller calculates, for each of a plurality of data blocks, a respective result based on a first metadata value and data of that data block, where the first metadata value describes a characteristic which is common to each of the plurality of data blocks. With each such calculated result, the memory controller further performs a respective error detection analysis, wherein such analysis is based on a retrieved error correction code for a corresponding one of the plurality of data blocks. In another embodiment, a single version of the metadata value is stored by the memory controller, where the single version of the metadata value is made available to facilitate error detection for any of the plurality of data blocks.

Claims

1. A memory controller comprising:

memory access logic to service one or more write requests, including the memory access logic to;

store to one or more memory devices a first data block, a second data block, a first error correction code corresponding to the first data block, and a second error correction code corresponding to the second data block;

identify a first metadata value as corresponding to both the first data block and the second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block; and

store reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;

wherein the memory controller comprises encoder logic, responsive to the one or more write requests, to;

calculate a first result based on the first data block and the first metadata value;

calculate a second result based on the second data block and the first metadata value;

calculate the first error correction code based on the first result; and

calculate the second error correction code based on the second result;

the memory access logic further to service one or more read requests, including the memory access logic to retrieve from the one or more memory devices first data of the first data block, second data of the second data block, the first error correction code and the second error correction code; and

wherein, responsive to the one or more read requests, the error detection logic further to generate a third result based on the retrieved first data and the first metadata value stored at the first location to perform a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code, to generate a first signal which indicates whether an error is indicated by the first error detection analysis, to generate a fourth result based on the retrieved second data and the first metadata value stored at the first location, to perform a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code, and to generate a second signal which indicates whether an error is indicated by the second error detection analysis.

2. The memory controller of claim 1, wherein the error detection logic to perform the first error detection analysis includes the error detection logic to calculate an error correction code for the first result and to compare the error correction code for the first result to the first error correction code.

3. The memory controller of claim 1, wherein the first result is a codeword including the first data, the first error correction code and the first metadata value, wherein the error detection logic to perform the first error detection analysis includes the error detection logic to calculate a syndrome for the codeword.

4. The memory controller of claim 1, wherein the memory access logic further to access reference information in response to the one or more read requests and to identify based on the reference information an association of the first data block and the second data block each with the first location.

5. The memory controller of claim 1, wherein the first error correction code includes one of a Reed-Solomon value, a Hamming value, a Bose, Ray-Chaudhuri, Hocquenghem value and a low-density parity-check value for the first result.

6. The memory controller of claim 1, wherein the one or more write requests include multiple write requests each including the first metadata value.

7. The memory controller of claim 1, wherein the memory access logic to store the first metadata value in response to the one or more write requests.

8. A method at a memory controller, the method comprising:

servicing one or more write requests, including;

identifying a first metadata value as corresponding to both a first data block and a second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block;

storing reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;

calculating a first result based on the first data block and the first metadata value;

calculating a second result based on the second data block and the first metadata value;

calculating a first error correction code based on the first result;

calculating a second error correction code based on the second result;

storing to one or more memory devices the first data block, the second data block, the first error correction code, and the second error correction code;

in response to one or more read requests, retrieving from one or more memory devices first data of the first data block, second data of the second data block, the first error correction code, and the second error correction code;

generating a third result based on the retrieved first data and the first metadata value stored at the first location;

performing a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code;

generating a first signal which indicates whether an error is indicated by the first error detection analysis;

generating a fourth result based on the retrieved second data and the first metadata value stored at the first location;

performing a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code; and

generating a second signal which indicates whether an error is indicated by the second error detection analysis.

9. The method of claim 8, further comprising:

accessing reference information in response to the one or more read requests; and

identifying based on the reference information an association of the first data block and the second data block each with the first location.

10. The method of claim 8, wherein the first error correction code includes one of a Reed-Solomon value, a Hamming value, a Bose, Ray-Chaudhuri, Hocquenghem value and a low-density parity-check value for the first result.

11. The method of claim 8, wherein generating the first result includes calculating one of:

a concatenation of the first data and the first metadata value;

a summation of the first data and the first metadata value;

or

a product of the first data and the first metadata value.

12. The method of claim 8, wherein the first metadata value includes one of an access statistic, a timestamp, or a file identifier.

13. The method of claim 8, further comprising storing the first metadata value in response to the one or more write requests.

14. The method of claim 13, wherein the one or more write requests include multiple write requests each including the first metadata value.

15. A system comprising:

one or more memory devices;

a memory controller to control the one or more memory devices, the memory controller including;

memory access logic to service one or more write requests, including the memory access logic to;

store to the one or more memory devices a first data block, a second data block, a first error correction code corresponding to the first data block, and a second error correction code corresponding to the second data block;

identify a first metadata value as corresponding to both the first data block and the second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block; and

store reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;

wherein the memory controller comprises encoder logic, responsive to the one or more write requests, to;

calculate a first result based on the first data block and the first metadata value;

calculate a second result based on the second data block and the first metadata value;

calculate the first error correction code based on the first result; and

calculate the second error correction code based on the second result;

the memory access logic further to service one or more read requests, including the memory access logic to retrieve from the one or more memory devices first data of the first data block, second data of the second data block, the first error correction code and the second error correction code; and

wherein, responsive to the one or more read requests, the error detection logic further to generate a third result based on the retrieved first data and the first metadata value stored at the first location to perform a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code, to generate a first signal which indicates whether an error is indicated by the first error detection analysis, to generate a fourth result based on the retrieved second data and the first metadata value stored at the first location, to perform a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code, and to generate a second signal which indicates whether an error is indicated by the second error detection analysis; and

a touchscreen display device configured to provide a user display based on data accessed by the memory controller.

16. The system of claim 15, wherein the error detection logic to perform the first error detection analysis includes the error detection logic to calculate an error correction code for the first result and to compare the error correction code for the first result to the first error correction code.

17. A non-transitory computer-readable storage medium having stored thereon instructions which, when executed by one or more processing units, cause the one or more processing units to perform a method comprising:

servicing one or more write requests, including;

identifying a first metadata value as corresponding to both a first data block and a second data block, wherein the first metadata value describes a characteristic that, prior to the one or more write requests, is common to the first data block and the second data block;

storing reference information in response to identification of the first metadata value, wherein the reference information associates the first data block and the second data block each with a first location storing the first metadata value;

calculating a first result based on the first data block and the first metadata value;

calculating a second result based on the second data block and the first metadata value;

calculating a first error correction code based on the first result;

calculating a second error correction code based on the second result;

storing to one or more memory devices the first data block, the second data block, the first error correction code, and the second error correction code;

in response to one or more read requests, retrieving from one or more memory devices first data of the first data block, second data of the second data block, the first error correction code, and the second error correction code;

generating a third result based on the retrieved first data and the first metadata value stored at the first location;

performing a first error detection analysis with the third result, wherein the first error detection analysis is based on the retrieved first error correction code;

generating a first signal which indicates whether an error is indicated by the first error detection analysis;

generating a fourth result based on the retrieved second data and the first metadata value stored at the first location;

performing a second error detection analysis with the fourth result, wherein the second error detection analysis is based on the retrieved second error correction code; and

generating a second signal which indicates whether an error is indicated by the second error detection analysis.

18. The computer-readable storage medium of claim 17, wherein the one or more write requests include multiple write requests each including the first metadata value.