Display driving circuit, display apparatus having the same and method of driving the same

• US 9,030,451 B2
• Filed: 02/27/2013
• Issued: 05/12/2015
• Est. Priority Date: 07/31/2012
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Lee, Jae-Han, Son, Sunkyu, Kang, Sun-Koo
• Primary Examiner(s): Cheng, Joe H
• Application Number:
  US13/778,414
• Publication Number:
  US 20140035897A1
• Time in Patent Office: 804 Days
• US Class Current: 345/204
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A display driving circuit includes a digital-to-analog converter configured to convert a digital image signal to an analog image signal, and a buffer circuit configured to receive the analog image signal and to output an output signal to be applied to a data line, where the buffer circuit includes an input stage configured to receive the analog image signal and to output a first signal, a first output stage configured to receive a first voltage and a second voltage and to output the output signal, a second output stage configured to receive a third voltage and a fourth voltage and to output the output signal, and a selection circuit configured to apply the first signal from the input stage to the first output stage or the second output stage in response to a mode signal.

Claims

1. A display driving circuit comprising:

a digital-to-analog converter configured to convert a digital image signal to an analog image signal; and

a buffer circuit configured to receive the analog image signal and to output an output signal to a data line,

wherein the buffer circuit comprises;

an input stage configured to receive the analog image signal and to output a first signal;

a first output stage configured to receive a first voltage and a second voltage and to output the output signal;

a second output stage configured to receive a third voltage and a fourth voltage and to output the output signal; and

a selection circuit configured to apply the first signal from the input stage to the first output stage or the second output stage in response to a mode signal.

2. The display driving circuit of claim 1, wherein

the selection circuit applies the first signal to the first output stage when the mode signal indicates a first mode,

the first voltage is a source voltage when the mode signal indicates the first mode, and

the second, third and fourth voltages are a ground voltage when the mode signal indicates the first mode.

3. The display driving circuit of claim 2, wherein

the selection circuit alternately applies the first signal to the first output stage and the second output stage when the mode signal indicates a second mode,

the first voltage is the source voltage when the mode signal indicates the second mode,

the fourth voltage is the ground voltage when the mode signal indicates the second mode, and

the second and third voltages have a voltage level between the source voltage and the ground voltage when the mode signal indicates the second mode.

4. The display driving circuit of claim 3, wherein the selection circuit alternately applies the first signal to the first output stage and the second output stage in response to a polarity inversion signal when the mode signal indicates the second mode.

5. The display driving circuit of claim 3, wherein

the first mode is a column inversion mode, and

the second mode is a dot inversion mode.

6. The display driving circuit of claim 1, wherein the digital-to-analog converter converts the digital image signal to a positive polarity analog image signal and a negative polarity analog image signal and applies one of the positive polarity analog image signal and the negative polarity analog image signal to the input stage in response to a polarity inversion signal.

7. The display driving circuit of claim 1, wherein the first signal output from the input stage comprises a first differential signal and a second differential signal.

8. The display driving circuit of claim 7, wherein

the first output stage comprises:

a first transistor connected between the first voltage and an output node, and which receives the first differential signal; and

a second transistor connected between the output node and the second voltage, and which receives the second differential signal, and

the second output stage comprises;

a third transistor connected between the third voltage and the output node, and which receives the first differential signal; and

a fourth transistor connected between the output node and the fourth voltage, and which receives the second differential signal.

9. The display driving circuit of claim 8, wherein the buffer circuit further comprises a switching circuit connected between the output node and the data line, wherein the switching circuit operates in response to a line latch signal.

10. A display apparatus comprising:

a plurality of gate lines;

a plurality of data lines crossing the gate lines;

a plurality of pixels connected to the gate lines and the data lines;

a gate driver configured to drive the gate lines;

a data driver configured to drive the data lines; and

a timing controller configured to control the gate driver and the data driver in response to a first image signal and a control signal from an external device and to apply a second image signal to the data driver,

wherein the data driver comprises;

a digital-to-analog converter configured to convert a digital image signal to an analog image signal; and

a buffer circuit configured to receive the analog image signal and to output an output signal to the data lines,

wherein the buffer circuit comprises;

an input stage configured to receive the analog image signal and to output a first signal;

a first output stage configured to receive a first voltage and a second voltage and to output the output signal;

a second output stage configured to receive a third voltage and a fourth voltage and to output the output signal; and

a selection circuit configured to apply the first signal from the input stage to the first output stage or the second output stage in response to a mode signal.

11. The display apparatus of claim 10, further comprising:

a voltage generator configured to generate the first, second, third and fourth voltages.

12. The display apparatus of claim 11, wherein

the selection circuit applies the first signal to the first output stage when the mode signal indicates a first mode,

the first voltage generated by the voltage generator is a source voltage when the mode signal indicates the first mode, and

the second, third and fourth voltages generated by the voltage generator are a ground voltage when the mode signal indicates the first mode.

13. The display apparatus of claim 11, wherein

the selection circuit alternately applies the first signal to the first output stage and the second output stage when the mode signal indicates a second mode,

the first voltage is a source voltage when the mode signal indicates the second mode,

the fourth voltage is a ground voltage when the mode signal indicates the second mode, and

the second and third voltages have a voltage level between the source voltage and the ground voltage when the mode signal indicates the second mode.

14. The display apparatus of claim 13, wherein the selection circuit alternately applies the first signal to the first output stage and the second output stage in response to a polarity inversion signal when the mode signal indicates the second mode.

15. A method of driving a display driving circuit, the method comprising:

converting a digital image signal to an analog image signal;

receiving the analog image signal to output a first signal;

applying the first signal to a first output stage or a second output stage in response to a mode signal;

outputting an output signal corresponding to the first signal using the first output stage when the first signal is applied to the first output stage; and

outputting the output signal corresponding to the first signal using the second output stage when the first signal is applied to the second output stage,

wherein

the output signal output from the first output stage has a voltage level between a first voltage and a second voltage, and

the output signal output from the second output stage has a voltage level between a third voltage and a fourth voltage.

16. The method of claim 15, wherein

the applying the first signal to the first output stage or the second output stage comprises applying the first signal to the first output stage when the mode signal indicates a first mode,

wherein the first voltage is a source voltage when the mode signal indicates the first mode, and

the second, third and fourth voltages are a ground voltage when the mode signal indicates the first mode.

17. The method of claim 15, wherein

the applying the first signal to the first output stage or the second output stage comprises alternately applying the first signal to the first output stage and the second output stage when the mode signal indicates a second mode,

wherein the first voltage is a source voltage when the mode signal indicates the second mode,

the fourth voltage is a ground voltage when the mode signal indicates the second mode, and

the second and third voltages have a voltage level between the source voltage and the ground voltage when the mode signal indicates the second mode.

18. The method of claim 17, wherein the alternately applying the first signal to the first output stage and the second output stage when the mode signal indicates the second mode is performed in response to a polarity inversion signal.