Apparatus, system and method for use in mounting electronic elements
First Claim
Patent Images
1. A surface mount device comprising:
- a casing having a recess formed extending at least partially into said casing; and
first and second leads each of which is at least partially encased by said casing and each of which has a portion exposed through said recess, wherein at least one of said first and second leads has one or more size reduction features in its said exposed portion that reduces the surface area to provide an increased surface bonding area to said casing around said lead;
wherein one of said exposed lead portions comprises a chipset carrier element comprising at least two of said size reduction features such that at least a portion of said chipset carrier element comprises first and second indentations opposite and parallel one another such that the width of said chipset portion narrows between said first and second indentations;
wherein said chipset portion adjoins a termination end;
wherein said termination end is wider than the area between said first and second indentations.
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Abstract
The present embodiments provide surface mount devices and/or systems. In some embodiments, the surface mount devices comprise a casing having a recess formed extending at least partially into said casing; and first and second leads each of which is at least partially encased by said casing and each of which has a portion exposed through said recess, wherein at least one of said first and second leads has one or more size reduction features in its said exposed portion that reduces the surface area to provide an increased surface bonding area to said casing around said lead.
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Citations
32 Claims
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1. A surface mount device comprising:
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a casing having a recess formed extending at least partially into said casing; and first and second leads each of which is at least partially encased by said casing and each of which has a portion exposed through said recess, wherein at least one of said first and second leads has one or more size reduction features in its said exposed portion that reduces the surface area to provide an increased surface bonding area to said casing around said lead; wherein one of said exposed lead portions comprises a chipset carrier element comprising at least two of said size reduction features such that at least a portion of said chipset carrier element comprises first and second indentations opposite and parallel one another such that the width of said chipset portion narrows between said first and second indentations; wherein said chipset portion adjoins a termination end; wherein said termination end is wider than the area between said first and second indentations. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A surface mount device comprising:
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a casing comprising a first surface having a recess extending into the casing; and first and second leads at least partially encased by said casing, said first lead having a chipset portion at least partially exposed through said recess, said second lead proximate said first lead, said second lead having a head portion exposed through said recess, wherein said chipset portion has first and second indentations opposite and parallel each other and said first indentation including a first depth and said second indentation including a second depth, wherein said first depth is different from said second depth, such that the width of said chipset portion narrows between said first and second indentations, wherein said chipset portion extends into a termination end encased by said casing; wherein the termination end extends beyond a perimeter of the recess. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A method of manufacturing a surface mount device, comprising:
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providing a first lead element comprising a chipset portion, said chipset portion comprising a first indentation and a second indentation parallel and opposite each other and said first indentation including a first depth and said second indentation including a second depth such that the width of said chipset portion narrows between said first and second indentation, wherein said chipset portion extends into a termination end encased by said casing; providing a second lead element comprising a head portion; encasing a portion of the first and second lead elements in a casing, the first and second lead elements positioned apart, the area between the first and second elements defining an insulation gap, the second indentation partially defines the insulation gap, and the chipset portion and the head portion terminating interior to the casing; and forming a recess in a first surface of the casing and exposing a section of the chipset portion, a section of the head portion, and a portion of the first and second indentations through the recess, such that said exposed portion of said first lead is narrower than surrounding exposed portions of said first lead; wherein the termination end extends beyond a perimeter of the recess. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32)
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Specification