Increasing leakage current of power source unit to adjust input resistance at network port for mitigating false detection as powered device

• US 9,037,876 B2
• Filed: 01/31/2010
• Issued: 05/19/2015
• Est. Priority Date: 01/31/2010
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Dove, Daniel Joseph
• Primary Examiner(s): KIM, KENNETH S
• Application Number:
  US13/260,175
• Publication Number:
  US 20120011380A1
• Time in Patent Office: 1,934 Days
• Field of Search: None
• US Class Current: 713/300
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: H04L 12/10 Current supply arrangements

Abstract

A system for power distribution to network devices in a powered network is described herein. The system includes a first power sourcing equipment (PSE) device, which is configured to communicate data and selectively provide power to one or more devices. The system further includes a second PSE device coupled to the first PSE device through a network cable. The second PSE device is configured to communicate data, selectively provide power to one or more devices, and to receive a probing input through the network cable. The second PSE device includes a false detection mitigation circuit, which is configured to increase a leakage current of the second PSE device. The increased leakage current is associated with a resistive signature that is outside of a resistive range of a valid powered device.

Claims

1. A power sourcing equipment (PSE) device for use in a powered network, comprising:

a PSE controller integrated circuit;

a power rail;

a plurality of network ports configured to communicate data, selectively provide power to one or more devices through a plurality of network cables, and to receive a probing input through a network cable of the plurality of network cables, the plurality of network ports coupled to the power rail;

a power supply circuit coupled to the power rail; and

a false detection mitigation circuit coupled to the power rail, the false detection mitigation circuit configured to increase a leakage current of the PSE device, wherein the increased leakage current is associated with a resistive signature that is outside of a resistive range of a valid powered device.

2. The PSE device of claim 1, wherein the false detection mitigation circuit is coupled to a positive voltage supply terminal of the power supply circuitry and a negative voltage supply terminal of the power supply circuit in parallel with the PSE integrated circuit.

3. The PSE device of claim 1, wherein the false detection mitigation circuit is integrated within the PSE controller integrated circuit.

4. The PSE device of claim 1, wherein the false detection mitigation circuit comprises:

a positive voltage supply terminal;

a negative voltage supply terminal; and

a resistor coupled to the positive voltage supply terminal and the negative power supply terminal.

5. The PSE device of claim 1, wherein the false detection mitigation circuit comprises:

a positive voltage supply terminal;

a negative voltage supply terminal;

a first transistor coupled to the positive voltage supply terminal;

a first resistor coupled to the first transistor;

a second resistor coupled to the first transistor;

a second transistor coupled to the first transistor and the positive voltage supply terminal;

a third resistor coupled to the second transistor;

a fourth resistor coupled to the positive voltage supply terminal; and

a zener diode coupled to the fourth resistor.

6. The PSE device of claim 1, wherein current consumption by the PSE device in a powered-on state is less than current consumption by the PSE device when a detection probe is present.

7. The PSE device of claim 1, wherein said PSE controller integrated circuit comprises a current sense pin connected through a resistor to said false detection mitigation circuit.

8. The PSE device of claim 7, wherein the current sense pin provides a leakage current path through the PSE controller integrated circuit.

9. A system for power distribution to network devices in a powered network, the system comprising:

a first power sourcing equipment (PSE) device configured to communicate data and selectively provide power to one or more devices; and

a second PSE device coupled to the first PSE device through a network cable configured to communicate data, selectively provide power to one or more devices, and to receive a probing input through the network cable, wherein the second PSE device includes a false detection mitigation circuit configured to increase a leakage current of the second PSE device, wherein the increased leakage current is associated with a resistive signature that is outside of a resistive range of a valid powered device.

10. The system of claim 9, wherein the false detection mitigation circuit is coupled to a positive voltage supply terminal of the second PSE device and a negative voltage supply terminal of the second PSE device in parallel with a PSE controller integrated circuit of the second PSE device.

11. The system of claim 9, wherein the false detection mitigation circuit comprises:

a positive voltage supply terminal;

a negative voltage supply terminal; and

a resistor coupled to the positive voltage supply terminal and the negative power supply terminal.

12. The system of claim 9, wherein the false detection mitigation circuit comprises:

a positive power supply terminal;

a negative power supply terminal;

a first transistor coupled to the positive power supply terminal;

a first resistor coupled to the first transistor;

a second resistor coupled to the first transistor;

a second transistor coupled to the first transistor and the positive power supply terminal;

a third resistor coupled to the second transistor;

a fourth resistor coupled to the positive power supply terminal; and

a zener diode coupled to the fourth resistor.

13. The system of claim 9, wherein the first PSE device is further configured to compare the resistive signature to the resistive range of a valid powered device.

14. A method for mitigating false powered device detection in a powered network, the powered network including a power sourcing equipment (PSE) device, the method comprising:

receiving a probing input through a network cable coupled to a network port of the PSE device;

applying the probe input to circuitry of the PSE; and

generating an increased leakage current of the PSE device in response to the probing input, wherein the increased leakage current is associated with a resistive signature that is outside of a resistive range of a valid powered device.

15. The method of claim 14, further comprising:

comparing the resistive signature to a resistive range of a valid powered device.

16. The method of claim 15, further comprising:

supplying data and power to the PSE device where the resistive signature is within the resistive range as a result of the comparison; and

supplying data and not power to the PSE device where the resistive signature is outside of the resistive range as a result of the comparison.

17. The method of claim 14, wherein the increased leakage current is generated while the PSE device is in a powered-off state.

18. The method of claim 14, wherein a leakage current produced by said probing input is increased to generate said increased leakage current by false detection mitigation circuitry in said PSE device.

19. The method of claim 18, further comprising tuning said false detection mitigation circuitry to minimize power loss during normal operation while still increasing said leakage current to that associated with said resistive signature when said PSE device is in a powered-off state.

20. The method of claim 19, wherein said tuning comprise changing a value of a resistor of said false detection mitigation circuitry.