Nanoscale switching device

• US 9,040,948 B2
• Filed: 09/16/2010
• Issued: 05/26/2015
• Est. Priority Date: 09/16/2010
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Ribeiro, Gilberto, Nickel, Janice H, Yang, Jianhua
• Primary Examiner(s): Kraig, William F
• Assistant Examiner(s): IVANOV, PAVEL G
• Application Number:
  US13/821,173
• Publication Number:
  US 20130168629A1
• Time in Patent Office: 1,713 Days
• Field of Search: 257/3
• US Class Current: 257/3
• CPC Class Codes: H10B 63/80 Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
• CPC Class Codes: H10N 70/041 Modification of switching materials after formation, e.g. doping shaping H10N70/061
• CPC Class Codes: H10N 70/24 based on migration or redistribution of ionic species, e.g. anions, vacancies
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/828 Current flow limiting means within the switching material region, e.g. constrictions
• CPC Class Codes: H10N 70/8833 Binary metal oxides, e.g. TaOx
• CPC Class Codes: H10N 70/884 based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors compounds of sulfur, selenium or tellurium, e.g. chalcogenides H10N70/882; oxides or nitrides H10N70/883

Abstract

A nanoscale switching device comprises a first electrode of a nanoscale width; a second electrode of a nanoscale width; an active region disposed between the first and second electrodes, the active region containing a switching material; an area within the active region that constrains current flow between the first electrode and the second electrode to a central portion of the active region; and an interlayer dielectric layer formed of a dielectric material and disposed between the first and second electrodes outside the active region. A nanoscale crossbar array and method of forming the nanoscale switching device are also disclosed.

Claims

1. A nanoscale switching device comprising:

a first electrode of a nanoscale width;

a second electrode of a nanoscale width;

an active region disposed between the first and second electrodes, the active region containing a switching material;

an area within the active region that constrains current flow between the first electrode and the second electrode to a central portion of the active region; and

an interlayer dielectric layer formed of a dielectric material and disposed between the first and second electrodes outside the active region;

wherein the area that constrains current flow within the active region comprises a lateral oxidation region of the switching material.

2. The nanoscale switching device of claim 1, wherein the switching material is capable of carrying a species of dopants and transporting the dopants under an electric field.

3. The nanoscale switching device of claim 1, wherein the lateral oxidation region has a content of oxygen that varies radially, being higher at the periphery of the active region and lower near the center of the active region.

4. The nanoscale switching device of claim 1, wherein the dielectric material is an oxide, a carbide, a nitride, or combination thereof.

5. A nanoscale crossbar array comprising:

a first group of conductive nanowires running in a first direction;

a second group of conductive nanowires running in a second direction and intersecting the first group of nanowires;

a plurality of switching devices formed at intersections of the first group of nanowires with the second group of nanowires, each switching device having a first electrode formed by a first nanowire of the first group and a second electrode formed by a second nanowire of the second group, an active region disposed at the intersection between the first and second electrodes, an area within the active region that constrains current flow between the first electrode and the second electrode to a central portion of the active region, and an interlayer dielectric layer of a dielectric material disposed between the first and second groups of nanowires outside the active region, the active region containing a switching material;

wherein the area that constrains current flow within the active region comprises a lateral oxidation region of the switching material.

6. The nanoscale crossbar array of claim 5, wherein the switching material is capable of carrying a species of dopants and transporting the dopants under an electric field.

7. The nanoscale crossbar array of claim 5, wherein the lateral oxidation region has a content of oxygen that varies radially, being higher at the periphery of the active region and lower near the center of the active region.

8. The nanoscale crossbar array of claim 5, wherein the dielectric material is an oxide, a carbide, a nitride, or combination thereof having a dielectric constant of 4 or less.

9. A method of forming a nanoscale switching device, comprising:

forming a first electrode of a nanoscale width and a second electrode of a nanoscale width;

forming an active region between the first and second electrodes, the active region comprising a switching material capable of carrying a species of dopants and transporting the dopants under an electric field;

forming an area within the active region that constrains current flow between the first electrode and the second electrode to a central portion of the active region; and

forming an interlayer dielectric layer of a dielectric material outside the active region;

wherein the switching material is a first metal oxide, and the area that constrains current flow is a lateral oxidation region of the switching material.

10. The method of claim 9, wherein the lateral oxidation region has a content of oxygen that varies radially, being higher at the periphery of the active region and lower near the center of the active region.

11. The method of claim 9, wherein the step of forming the area that constrains current flow includes a plasma etch to define bits in an array of the nanoscale switching devices and an oxidation of the active region with or without elevated temperature.