Systems and methods for characterizing a molecule
First Claim
Patent Images
1. A method for nucleic acid sequencing, comprising:
- (a) providing a chip comprising a membrane adjacent to an electrode;
(b) measuring a capacitance and/or resistance across said membrane; and
(c) based on said capacitance and/or resistance measured in (b), (i) applying a destruction stimulus if said membrane exhibits a capacitance less than about 5 fF/μ
m2 and/or a resistance less than about 10 GΩ
across said membrane under an applied voltage of about 50 mV, or (ii) forming a nanopore in said membrane if said membrane exhibits a capacitance greater than about 5 fF/μ
m2 and/or a resistance greater than about 10 GΩ
across said membrane under an applied voltage of about 50 mV.
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Abstract
Techniques for characterizing a molecule are described herein. In one example, a portion of the molecule is trapped in a nanopore, a variable voltage is applied across the nanopore until the trapped portion of molecule is moved within the nanopore, and the molecule is characterized based on the electrical stimulus required to affect movement of at least a portion of the trapped portion of the molecule within the nanopore.
209 Citations
20 Claims
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1. A method for nucleic acid sequencing, comprising:
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(a) providing a chip comprising a membrane adjacent to an electrode; (b) measuring a capacitance and/or resistance across said membrane; and (c) based on said capacitance and/or resistance measured in (b), (i) applying a destruction stimulus if said membrane exhibits a capacitance less than about 5 fF/μ
m2 and/or a resistance less than about 10 GΩ
across said membrane under an applied voltage of about 50 mV, or (ii) forming a nanopore in said membrane if said membrane exhibits a capacitance greater than about 5 fF/μ
m2 and/or a resistance greater than about 10 GΩ
across said membrane under an applied voltage of about 50 mV. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A system for nucleic acid sequencing, comprising:
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(a) a chip comprising a membrane adjacent to an electrode; and (b) a processor coupled to said chip, wherein said processor executes instructions stored on and/or provided by a memory coupled to said processor, which instructions implement a method comprising; (1) measuring a capacitance and/or resistance across said membrane; and (2) based on said capacitance and/or resistance measured in (1), (i) applying a destruction stimulus if said membrane exhibits a capacitance less than about 5 fF/μ
m2 and/or a resistance less than about 10 GΩ
across said membrane under an applied voltage of about 50 mV, or (ii) forming a nanopore in said membrane if said membrane exhibits a capacitance greater than about 5 fF/μ
m2 and/or a resistance greater than about 10 GΩ
across said membrane under an applied voltage of about 50 mV. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification