Image sensor pixel cell readout architecture

• US 9,041,842 B2
• Filed: 07/12/2013
• Issued: 05/26/2015
• Est. Priority Date: 07/12/2013
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Willassen, Trygve
• Primary Examiner(s): DAGNEW, MEKONNEN D
• Application Number:
  US13/940,710
• Publication Number:
  US 20150015757A1
• Time in Patent Office: 683 Days
• Field of Search: 348300-310, 438109-110, 250/208.1
• US Class Current: 348/308
• CPC Class Codes: H04N 25/59 by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

An image sensor includes a pixel array including a plurality of pixel cells each including a floating diffusion node, a photosensitive element coupled to selectively transfer image charge to the floating diffusion node, and a feedback coupling capacitor coupled between the floating diffusion node and an output line. A bit line is coupled to selectively readout image data output from each one of a group of the plurality of pixel cells. An integrator is capacitively coupled to the bit line. The integrator is coupled to output an output signal on the output line in response to the image data. The output signal on the output line is capacitively coupled to the floating diffusion node through the feedback coupling capacitor to suppress a potential swing at the floating diffusion node of each one of the group of the plurality of pixel cells in response to the output signal.

Claims

1. An image sensor, comprising:

a pixel array including a plurality of pixel cells, wherein each one of the plurality of pixel cells includes;

a floating diffusion node;

a photosensitive element coupled to selectively transfer image charge to the floating diffusion node; and

a feedback coupling capacitor coupled between the floating diffusion node and an output line;

a bit line coupled to selectively readout image data output from each one of a group of the plurality of pixel cells; and

an integrator capacitively coupled to the bit line, wherein the integrator is coupled to output an output signal on the output line in response to the image data, wherein the output signal on the output line is capacitively coupled to the floating diffusion node through the feedback coupling capacitor to suppress a potential swing at the floating diffusion node of each one of the group of the plurality of pixel cells in response to the output signal, wherein the integrator comprises an op amp coupled as an integrator, and wherein the first input of the integrator comprises an inverting input of the op amp, wherein an open loop gain of the op amp is coupled to drive a positive voltage step on the output line to supply charge to the floating diffusion node through the feedback capacitor to maintain a voltage at the floating diffusion node above a voltage at the photosensitive element.

2. The image sensor of claim 1 wherein the group of the plurality of pixel cells includes a column of the pixel array.

3. The image sensor of claim 1 further comprising an input coupling capacitor coupled between a first input of the integrator and the bit line such that the bit line is capacitively coupled to the first input of the integrator.

4. The image sensor of claim 3 wherein the input coupling capacitor is coupled to support different DC voltage levels between the bit line and the first input of the integrator.

5. The image sensor of claim 1 further comprising a current source coupled between the inverting input of the op amp and a ground terminal, wherein the current source is coupled to sink current to the ground terminal.

6. The image sensor of claim 1 further comprising an analog to digital converter coupled to the output line to generate a digital signal in response to an analog signal on the output line.

7. The image sensor of claim 1 further comprising a sample and hold circuit coupled to the output line to sample and hold the output signal on the output line.

8. The image sensor of claim 7 wherein the sample and hold circuit is coupled to output a first sample of the output line after a reset, and wherein the sample and hold circuit is further coupled to output a second sample of the output line in response to the image data, wherein an output value of each one of the plurality of pixel cells is responsive to a difference between the second sample and the first sample.

9. The image sensor of claim 1 wherein each one of the plurality of pixel cells further includes a reset transistor coupled between the floating diffusion node and a supply voltage to selectively reset the image charge in the floating diffusion node and the photosensitive element.

10. The image sensor of claim 1 wherein each one of the plurality of pixel cells further includes a transfer transistor coupled between the photosensitive element and the floating diffusion node to selectively transfer the image charge to the floating diffusion node from the photosensitive element.

11. The image sensor of claim 1 wherein each one of the plurality of pixel cells further includes an amplifier coupled to the floating diffusion node to generate the image data in response to the image charge at the floating diffusion node.

12. The image sensor of claim 11 wherein each one of the plurality of pixel cells further includes a select transistor coupled between the amplifier and the bit line to selectively transfer the image data from the amplifier to the bit line.

13. An imaging system, comprising:

a pixel array including a plurality of pixel cells, wherein each one of the plurality of pixel cells includes;

a floating diffusion (“

FD”

) node;

a photosensitive element coupled to selectively transfer image charge to the floating diffusion node; and

a feedback coupling capacitor coupled between the floating diffusion node and an output line;

control circuitry coupled to the pixel array to control operation of the pixel array; and

readout circuitry including an integrator capacitively coupled to a bit line to selectively readout image data output from each one of a group of the plurality of pixel cells, wherein the integrator is coupled to output an output signal on the output line in response to the image data, wherein the output signal on the output line is capacitively coupled to the floating diffusion node through the feedback coupling capacitor to suppress a potential swing at the floating diffusion node of each one of the group of the plurality of pixel cells in response to the output signal, wherein the input coupling capacitor is coupled to support different DC voltage levels between the bit line and the input of the integrator, wherein the integrator is coupled to drive a positive voltage step on the output line to supply charge to the floating diffusion node through the feedback capacitor to maintain a voltage at the floating diffusion node above a voltage at the photosensitive element.

14. The imaging system of claim 13 wherein the group of the plurality of pixel cells includes a column of the pixel array, wherein the integrator is one of a plurality of integrators included in the readout circuitry.

15. The imaging system of claim 13 further comprising an input coupling capacitor coupled between an input of the integrator and the bit line such that the bit line is capacitively coupled to the input of the integrator.

16. The imaging system of claim 13 further comprising function logic coupled to the readout circuitry to store the image data readout from the plurality of pixel cells.

17. A method of operating an image sensor, the method comprising:

resetting a photosensitive element and a floating diffusion node in an image sensor pixel cell;

accumulating image charge in the photosensitive element;

transferring the image charge to the floating diffusion node from the photosensitive element;

generating image data on a bit line in response to the image charge at the floating diffusion node;

integrating the image data on the bit line with an integrator to generate an output signal on an output line of the integrator in response to the image data; and

suppressing a potential swing at the floating diffusion node with capacitive feedback coupling between the output line and the floating diffusion node, wherein suppressing the potential swing at the floating diffusion node with the capacitive feedback coupling between the output line and the floating diffusion node comprises driving a positive voltage step on the output line with the integrator to supply charge to the floating diffusion node through the feedback capacitor to maintain a voltage at the floating diffusion node above a voltage at the photosensitive element.

18. The method of claim 17 further comprising resetting the integrator while resetting the photosensitive element and the floating diffusion node in the image sensor pixel cell.

19. The method of claim 17 further comprising generating a first sample of the output signal on the output line after resetting the photosensitive element and the floating diffusion node in the image sensor pixel cell and prior to transferring the image charge to the floating diffusion node from the photosensitive element.

20. The method of claim 19 further comprising generating a second sample of the output signal on the output line after integrating the image data on the bit line with the integrator to generate the output signal on the output line of the integrator in response to the image data.

21. The method of claim 17 further comprising generating an output value in response to a difference between the second sample of the output signal and the first sample of the output signal.

22. The method of claim 17 further comprising converting an analog value of the output signal to a digital value of the output signal.

23. The method of claim 17 further comprising amplifying the image charge at the floating diffusion node with an amplifier transistor to generate the image data on the bit line.

24. The method of claim 17 further comprising supporting different DC voltages between the bit line and an input of the integrator with a capacitive coupling between the bit line and the input of the integrator.