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Techniques for connected component labeling

  • US 9,042,652 B2
  • Filed: 11/01/2012
  • Issued: 05/26/2015
  • Est. Priority Date: 11/01/2012
  • Status: Active Grant
First Claim
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1. An apparatus, comprising:

  • a memory;

    a processor circuit coupled to the memory; and

    a connected component labeling module operative of the processor circuit to;

    determine one or more connected components during reading of an image comprising a multiplicity of pixels from the memory;

    assign a label to a plurality of pixels of the multiplicity of pixels;

    generate one or more label connections for a respective one or more labels, each label connection linking a higher label to a lowest label for the same connected component;

    write to the memory for each label of the one or more labels a lowest label as defined by the label connection for the each label after a label is assigned to each pixel;

    read the label connections from a running buffer when a maximum number of updated labels supported by the running buffer is reached;

    mark a label position corresponding to labels updated; and

    determine a lowest label available for currently stored labels in the running buffer.

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