High voltage monitoring successive approximation analog to digital converter
First Claim
1. An analog to digital converter (ADC) comprising:
- a switched capacitor array, wherein the capacitor array has a total capacitance value of C2;
a differential amplifier selectably configurable as either an operational amplifier or a comparator, said differential amplifier having first and second inputs and an output, wherein the first input is coupled to a reference voltage and wherein the switched capacitor array is coupled across the second input and the output of the differential amplifier;
an input capacitor switchably coupled between the differential amplifier second input and an analog voltage source adapted to provide an analog voltage signal to be converted to a digital output signal, said input capacitor having a capacitance value of C1;
a successive approximation register coupled to the switched capacitor array and the differential amplifier output and configured to provide the digital output signal; and
a logic signal generator configured to provide timing control logic signals arranged to;
(a) charge the input capacitor to the value of the analog voltage signal and configure the differential amplifier as an operational amplifier during a sampling interval such that a virtual ground is established at the differential amplifier second input for facilitating charge transfer from the input capacitor to the switched capacitor array;
(b) transfer the analog voltage signal on the input capacitor multiplied by the ratio C1/C2 to the capacitor array during a transfer interval; and
(c) configure the differential amplifier as a comparator for comparing the reference voltage to the voltage on the switched capacitor array, wherein the capacitors in the switched capacitor array are switched for converting the voltage on the capacitor array to digital output bits for storage in the successive approximation register according to the comparator output in a successive approximation protocol during an analog to digital conversion interval to thereby provide the digital output signal.
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Abstract
A successive approximation ADC made of a low voltage configurable differential amplifier and low voltage logic circuits which can convert a high voltage analog input to a digital equivalent. The differential amplifier can be configured as either an op amp or a comparator depending upon the mode of operation. An input capacitor C1 is switchably coupled to an electrode selected for voltage sampling. A switched capacitor array C2 is coupled across the differential amplifier input and output. A SAR coupled to the switched capacitor array provides a digital output corresponding to the sampled analog voltage. During a sampling interval and a charge transfer interval, the differential amplifier is configured as an op amp. During the transfer interval, the voltage on the input capacitor multiplied by the ratio C1/C2 is transferred to the switched capacitor array. During an analog to digital conversion interval, the ADC converts the analog voltage to an equivalent digital output.
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Citations
30 Claims
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1. An analog to digital converter (ADC) comprising:
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a switched capacitor array, wherein the capacitor array has a total capacitance value of C2; a differential amplifier selectably configurable as either an operational amplifier or a comparator, said differential amplifier having first and second inputs and an output, wherein the first input is coupled to a reference voltage and wherein the switched capacitor array is coupled across the second input and the output of the differential amplifier; an input capacitor switchably coupled between the differential amplifier second input and an analog voltage source adapted to provide an analog voltage signal to be converted to a digital output signal, said input capacitor having a capacitance value of C1; a successive approximation register coupled to the switched capacitor array and the differential amplifier output and configured to provide the digital output signal; and a logic signal generator configured to provide timing control logic signals arranged to; (a) charge the input capacitor to the value of the analog voltage signal and configure the differential amplifier as an operational amplifier during a sampling interval such that a virtual ground is established at the differential amplifier second input for facilitating charge transfer from the input capacitor to the switched capacitor array; (b) transfer the analog voltage signal on the input capacitor multiplied by the ratio C1/C2 to the capacitor array during a transfer interval; and (c) configure the differential amplifier as a comparator for comparing the reference voltage to the voltage on the switched capacitor array, wherein the capacitors in the switched capacitor array are switched for converting the voltage on the capacitor array to digital output bits for storage in the successive approximation register according to the comparator output in a successive approximation protocol during an analog to digital conversion interval to thereby provide the digital output signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of converting an analog signal to a digital equivalent signal utilizing an analog to digital converter, said converter comprising:
- a differential amplifier configurable as either an op amp or a comparator, said differential amplifier having first and second inputs and an output, wherein a reference voltage is coupled to the first input;
a capacitor array coupled across the second input and the output, said capacitor array having a total capacitance value of C2;
an input capacitor switchably coupled between a source of analog signals and the second input, said input capacitor having a capacitance value of C1;
a successive approximation register coupled to the switched capacitor array and the differential amplifier output; and
a logic signal generator configured to provide timing control logic signals to;
define a sampling interval, define a transfer interval and define an analog to digital conversion interval respectively, the method comprising;sampling the analog signal onto the input capacitor during the sampling interval wherein the differential amplifier is configured as an op amp; transferring the sampled signal on the input capacitor multiplied by the ratio C1/C2 during the transfer interval to the switched capacitor array, wherein the differential amplifier is configured as an op amp; and configuring the differential amplifier as a comparator and converting the voltage on the capacitor array to digital output bits for storage in the successive approximation register according to the comparator output in a successive approximation protocol during an analog to digital conversion interval to thereby provide the digital equivalent signal.
- a differential amplifier configurable as either an op amp or a comparator, said differential amplifier having first and second inputs and an output, wherein a reference voltage is coupled to the first input;
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12. A peripherally-implantable neurostimulation system comprising:
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a plurality of leads, wherein each of the plurality of leads comprises at least one electrode; an analog-to-digital converter comprising a successive approximation analog-to-digital converter and an integral switched capacitor amplifier, wherein the successive approximation analog-to-digital converter and the integral switched capacitor amplifier share a common differential amplifier; and a pulse generator configured to generate one or several electrical pulses, wherein the pulse generator is connected to the leads such that the electrical pulses are transmitted to the at least one electrode. - View Dependent Claims (13, 14, 15, 16, 17)
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18. An implantable electrical stimulation system comprising:
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a pulse generator configured to generate one or several electrical pulses; an electrode array configured to output the one or several electrical pulses; an analog-to-digital converter configured to convert an analog signal associated with at least one of the electrodes of the electrode array to a digital signal, the analog-to-digital converter including a reconfigurable differential amplifier; and a controller configured to reconfigure the differential amplifier between an operational amplifier mode and a comparator mode. - View Dependent Claims (19, 20, 21, 22, 23)
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24. A method of treating neuropathic pain, comprising:
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delivering at least one electrical pulse to a body tissue proximate or at a nerve by an implanted pulse generator and at least one electrode; sensing an analog attribute of the at least one electrical pulse using a differential amplifier configured in an operational amplifier mode; and converting the sensed analog attribute to a digital signal using the differential amplifier configured in a comparator mode. - View Dependent Claims (25, 26, 27, 28, 29, 30)
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Specification