On-die trim-able passive components for high volume manufacturing

• US 9,046,552 B2
• Filed: 06/27/2013
• Issued: 06/02/2015
• Est. Priority Date: 03/15/2013
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Paillet, Fabrice, Schrom, Gerhard, Lyakhov, Alexander, Geannopoulos, George L., Vunnam, Ravi Sankar, Hodgson, J. Keith
• Primary Examiner(s): Chang, Joseph
• Application Number:
  US13/929,727
• Publication Number:
  US 20140266486A1
• Time in Patent Office: 705 Days
• Field of Search: 331/135, 331/177.V
• US Class Current: 1/1
• CPC Class Codes: G01R 19/0092 measuring current only all subgroups of G01R19/00 take precedence
• CPC Class Codes: G06T 3/40 Scaling of whole images or parts thereof, e.g. expanding or contracting
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 1/088 for the simultaneous control of series or parallel connected semiconductor devices
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/1566 with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation
• CPC Class Codes: H02M 3/157 with digital control
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H03L 5/00 Automatic control of voltage, current, or power
• CPC Class Codes: H03M 1/66 Digital/analogue converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H03M 1/685 the quantisation value generators of both converters being arranged in a common two-dimensional array

Abstract

Described is an apparatus to trim on-die passive components. The apparatus comprises: a resistor-capacitor (RC) dominated oscillator independent of first order transistor speed dependency, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having a frequency depending substantially on values of the programmable resistance and capacitance; and a trim-able resistor or capacitor operable to be trimmed, for compensating process variations, according to a program code associated with the programmable resistance and capacitance of the RC dominated oscillator.

Claims

1. An apparatus comprising:

a resistor-capacitor (RC) dominated oscillator, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having a frequency depending substantially on values of the programmable resistance and capacitance, and wherein at least one value of the programmable resistance and capacitance is configured by a program code to achieve the frequency; and

a trim-able resistor or capacitor operable to be trimmed, for compensating process variations, according to the program code associated with the programmable resistance and capacitance of the RC dominated oscillator.

2. The apparatus of claim 1, wherein each resistor of the RC dominated oscillator comprises:

a first resistor;

a second resistor coupled in series with the first resistor;

a first pass-gate operable to short the first and second resistors; and

a second pass-gate operable to short the second resistor.

3. The apparatus of claim 2, wherein the first pass-gate is controllable by one or more signals associated with the program code.

4. The apparatus of claim 1, wherein the trim-able resistor comprises a unit cell, the unit cell including:

a first resistor;

a second resistor coupled in series with the first resistor; and

a pass-gate operable to short the second resistor.

5. The apparatus of claim 4, wherein the pass-gate is controllable by one or more signals associated with the program code.

6. The apparatus of claim 1, wherein the trim-able resistor comprises a unit cell, the unit cell including:

a resistor; and

a pass-gate operable to couple the resistor with another component.

7. The apparatus of claim 6, wherein the pass-gate is controllable by one or more signals associated with the program code.

8. The apparatus of claim 1, wherein each capacitor of the RC dominated oscillator comprises:

a first capacitor; and

a plurality of capacitors operable to be coupled in parallel to the first capacitor via a corresponding plurality of pass-gates, and wherein the plurality of pass-gates are controllable by one or more signals associated with the program code.

9. The apparatus of claim 1, wherein the trim-able capacitor comprises a unit cell, the unit cell including:

a first capacitor; and

a plurality of capacitors operable to be coupled in parallel to the first capacitor via a corresponding plurality of pass-gates, and wherein the plurality of pass-gates are controllable by one or more signals associated with the program code.

10. The apparatus of claim 1 further comprises a lookup table (LUT) to translate the program code to a code for trimming the trim-able resistor or capacitor.

11. The apparatus of claim 1 further comprises a storage medium having instructions thereon that when executed cause a logic to translate the program code to a code for trimming the trim-able resistor or capacitor.

12. The apparatus of claim 1, wherein the trim-able resistor or capacitor are part of a voltage regulator.

13. A method comprising:

determining a target frequency;

operating a resistor-capacitor (RC) dominated oscillator to achieve the target frequency, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having the target frequency depending substantially on values of the programmable resistance and capacitance at least one of which is configured by a program code; and

trimming a trim-able resistor or capacitor, for compensating process variations, according to the program code corresponding to the target frequency, the program code associated with the programmable resistance and capacitance of the RC dominated oscillator.

14. The method of claim 13, wherein the trim-able resistor comprises:

a first resistor;

a second resistor coupled in series with the first resistor; and

a pass-gate operable to short the second resistor.

15. The method of claim 14 further comprises controlling the pass-gate by one or more signals associated with the program code.

16. The method of claim 13 further comprises translating the program code to a code for trimming the trim-able resistor or capacitor using a lookup table (LUT).

17. A system comprising:

a memory unit;

a processor coupled to the memory unit, the processing including;

a resistor-capacitor (RC) dominated oscillator, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having a frequency depending substantially on values of the programmable resistance and capacitance, and wherein at least one value of the programmable resistance and capacitance is configured by a program code to achieve the frequency; and

a trim-able resistor or capacitor operable to be trimmed, for compensating process variations, according to the program code associated with the programmable resistance and capacitance of the RC dominated oscillator; and

a wireless interface for allowing the processor to communicate with another device.

18. The system of claim 17, wherein the trim-able resistor comprises a unit cell, the unit cell including:

a first resistor;

a second resistor coupled in series with the first resistor; and

a pass-gate operable to short the second resistor, wherein the pass-gate is controllable by one or more signals associated with the program code.

19. The system of claim 17, wherein the trim-able capacitor comprises a unit cell, the unit cell including:

a first capacitor; and

a plurality of capacitors operable to be coupled in parallel to the first capacitor via a corresponding plurality of pass-gates, and wherein the plurality of pass-gates are controllable by one or more signals associated with the program code.

20. The system of claim 17 further comprises a display unit to display content processed by the processor.