Method, system and software for accessing design rules and library of design features while designing semiconductor device layout

• US 9,047,437 B2
• Filed: 05/28/2014
• Issued: 06/02/2015
• Est. Priority Date: 10/31/2011
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chen, Chin-An, Wu, Pei-Tzu, Tsai, Tsung-Chieh, Wu, Juing-Yi, Ting, Jyh-Kang
• Primary Examiner(s): LEE, ERIC D
• Application Number:
  US14/289,256
• Publication Number:
  US 20140282294A1
• Time in Patent Office: 370 Days
• Field of Search: 716/139
• US Class Current: 1/1
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

Provided is a system and method for designing the layout of integrated circuits or other semiconductor devices while directly accessing design rules and a library of design features by interfacing with a GUI upon which the design layout is displayed. The design rules may be directly linked to the design features of the pattern library and imported into the device layout. The design rules may be directly accessed while designing the layout or while conducting a design rule check and the design features from the pattern library may be used in creating the layout.

Claims

1. A non-transitory computer readable storage medium encoded with computer program code such that, when said computer program code is executed by a processor, said processor performs a semiconductor device design method, said design method comprising:

accessing design rules by interacting with a graphical user interface (GUI) by selecting a feature of a semiconductor device layout when said semiconductor device layout is displayed on said GUI,

wherein said accessing said design rules automatically accesses a library of design features, and wherein the semiconductor device layout is used to form a photomask set.

2. The non-transitory computer readable storage medium as in claim 1, wherein said design rules are linked to said library of design features, said method further comprises designing said semiconductor device layout, and wherein said automatically accessing said library of design features by interacting with said GUI comprises using at least one of said design features in said designing a semiconductor device layout.

3. The non-transitory computer readable storage medium as in claim 1, wherein said method further comprises designing said semiconductor device layout and importing at least one of said design features directly into said semiconductor device layout and wherein said designing, said accessing design rules and said importing take place simultaneously and said method further comprises performing a design rule check and finalizing said layout in compliance with said design rules.

4. The non-transitory computer readable storage medium as in claim 1, wherein said design rules are linked to a library of design features and further comprising importing at least one of said design features directly into said semiconductor device layout.

5. The non-transitory computer readable storage medium as in claim 1, wherein said method further comprises causing a library of design features to be displayed on said GUI and wherein said accessing design rules comprises causing said design rules to be displayed on said GUI and includes positioning a cursor on a desired design feature of said design features to select a desired design feature.

6. A method for designing a semiconductor device, said method comprising:

accessing design rules by interacting with a graphical user interface (GUI) by selecting a feature of a layout of a semiconductor device when said layout is displayed on said GUI and displaying a library of design features on said GUI when said layout is displayed, wherein said accessing design rules automatically accesses said library of design features, and wherein the layout is used to form a photomask set.

7. The method as in claim 6, wherein said design rules are linked to said library of design features.

8. The method as in claim 6, further comprising designing said layout and displaying said layout on said GUI using an electronic design automation (EDA) system.

9. The method as in claim 8, wherein said designing said layout and said displaying said layout on a GUI using an electronic design automation (EDA) system includes:

providing a tangible computer readable storage medium to a processor of said EDA system, said tangible computer readable storage medium encoded with computer program code such that, when said computer program code is executed by said processor, said processor enables a user to use said EDA system to perform said designing said layout and said displaying said layout on a GUI, and said accessing design rules, by interacting with said GUI.

10. The method as in claim 6, further comprising importing at least one desired design feature from said library of design features by selecting said at least one desired design feature from said library and importing said at least one desired design feature into said layout by interacting with said GUI.

11. The method as in claim 10, wherein said importing at least one desired design feature comprises forming a finalized layout that complies with said design rules and includes at least one of said design features, and further comprising using said photomask set to form a semiconductor device.

12. The method as in claim 6, wherein said accessing design rules comprises positioning a cursor on a portion of said layout and clicking a mouse, and further comprising checking said layout for compliance with said design rules by interacting with said GUI.

13. The method as in claim 6, wherein said accessing design rules comprises displaying said design rules on said GUI, and said design rules are process verified design rules associated with mask manufacturing and device fabrication.

14. The method as in claim 6, wherein said design rules are linked to said design features and said accessing design rules takes place prior to designing said layout.

15. The method as in claim 6, further comprising importing at least one desired design feature of said design features into said layout by interacting with said GUI, wherein said importing takes place during designing said layout, and further comprising performing a design rule check and finalizing said layout.

16. An electronic design automation (EDA) system comprising:

a processor;

a graphical user interface (GUI);

a non-transitory computer readable storage medium encoded with computer program code configured to be executed by said processor to enable a user to use said EDA system to design a semiconductor device layout according to a method comprising;

accessing design rules by interacting with said GUI by selecting a feature of said semiconductor device layout and displaying a library of design features on said GUI when said semiconductor device layout is displayed on said GUI,

wherein said design rules are associated with said device features and said accessing design rules automatically accesses said library and causes said library to be displayed on said GUI, and wherein the semiconductor device layout is used to form a photomask set.

17. The EDA system as in claim 16, wherein said design rules are further associated with photomask manufacturing and device fabrication.

18. The EDA system as in claim 16, wherein said method further comprises importing at least one of said design features directly into said semiconductor device layout by interacting with said GUI, and wherein said design rules are linked to said library of design features.

19. The EDA system as in claim 16, wherein said method further comprises performing a design of said semiconductor device layout, displaying said semiconductor device layout on said GUI and comparing at least one of said design rules to at least one feature of said semiconductor device layout.