Data transmission system including encoder and a clock recovery system for display device, data transmission method for display device and display device

• US 9,049,092 B2
• Filed: 03/27/2012
• Issued: 06/02/2015
• Est. Priority Date: 03/29/2011
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Sugiyama, Akio, Nose, Takashi, Hori, Yoshihiko, Furihata, Hirobumi
• Primary Examiner(s): Ghebretinsae, Temesgh
• Assistant Examiner(s): Lin, Hang
• Application Number:
  US13/431,859
• Publication Number:
  US 20120249618A1
• Time in Patent Office: 1,162 Days
• Field of Search: 341 50-107, 345204-215
• US Class Current: 1/1
• CPC Class Codes: G06F 13/00 Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units interface circuits for specific input/output devices G06F3/00 ; multiprogram control therefor G06F9/46; multiprocessor systems G06F15/16
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/064 by time modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 2360/127 Updating a frame memory using a transfer of data from a source area to a destination area
• CPC Class Codes: G09G 2360/16 Calculation or use of calculated indices related to luminance levels in display data
• CPC Class Codes: G09G 2370/00 Aspects of data communication
• CPC Class Codes: G09G 3/2018 by time modulation using two or more time intervals
• CPC Class Codes: G09G 3/2096 Details of the interface to the display terminal specific for a flat panel suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167
• CPC Class Codes: G09G 5/008 Clock recovery
• CPC Class Codes: G09G 5/18 Timing circuits for raster scan displays specially adapted for television H04N ; synchronisation between the display unit and other display units, videodisc player G09G5/12
• CPC Class Codes: H04L 25/49 using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems spectral shaping H04L25/03828
• CPC Class Codes: H04L 25/4908 using mBnB codes
• CPC Class Codes: H04N 7/01 Conversion of standards , e.g. involving analogue television standards or digital television standards processed at pixel level

Abstract

A data transmission system for a display device, which is an mBnB encoding system encoding a signal of m (m is a natural number) bits into a signal of n (n is a natural number and n>m) bits on the basis of a certain translation table to be transmitted thereafter, the system including: an output driver of outputting a gray scale voltage in accordance with the data decoded at a receiver side, in which in the translation table, a bit pattern with a larger data change index from among 2ⁿ pieces of bit patterns of the n bits of the data is assigned to a bit pattern with a larger amplitude of the gray scale voltage from among 2^m pieces of bit patterns of the m bits of the data.

Claims

1. A data transmission system for a display device, the data transmission system comprising:

an encoder having at least one translation table, and encoding m (m is a natural number) bits of a data into n (n is a natural number and n>

m) bits of a data on the basis of the at least one translation table;

a clock recovery circuit of recovering a clock from the data encoded by the encoder;

a decoder of decoding the n bits of the encoded data to the m bits of the data in accordance with the clock recovered by the clock recovery circuit;

an output driver of outputting a gray scale voltage in accordance with the data decoded by the decoder,

wherein the at least one translation table includes a first translation table, and wherein in the first translation table, the larger the amplitude of the gray scale voltage of a bit pattern in 2^m pieces of bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in 2ⁿ pieces of bit patterns of the n bits of the data;

a data generating circuit of regularly converting or inversely converting the data inputted to the encoder in accordance with a first display mode signal; and

a data converter of regularly converting or inversely converting the data outputted from the decoder in accordance with a second display mode signal,

wherein the at least one translation table is only one translation table for a normally black mode or for a normally white mode.

2. The data transmission system for a display device according to claim 1, wherein in the first translation table, the encoder includes a first translation table for the normally black mode as the at least one translation table, the larger the data value of the bit pattern in 2^m pieces of the bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in the 2ⁿ pieces of the bit patterns of the n bits of the data.

3. The data transmission system for a display device according to claim 1, wherein the encoder includes a second translation table for the normally white mode as the at least one translation table, and in the second translation table, the smaller the data value of the bit pattern in the 2^m pieces of the bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in the 2ⁿ pieces of the bit patterns of the n bits of the data.

4. The data transmission system for a display device according to claim 1, further comprising:

a first register of storing the first display mode signal; and

a second register of storing the second display mode signal.

5. The data transmission system for a display device according to claim 1, wherein the first and the second display mode signals comprise signals indicating the normally black mode or the normally white mode.

6. The data transmission system for a display device according to claim 1, further comprising:

a parallel to serial converter of subjecting the encoded data outputted from the encoder to a parallel to serial conversion; and

a serial to parallel converter of subjecting the data outputted from the parallel to serial converter to a serial to parallel conversion.

7. A method of transmitting a data for a display device comprising:

encoding m (m is a natural number) bits of a data to n (n is a natural number and n>

m) bits of a data on the basis of at least one translation table;

recovering a clock from the encoded data;

decoding the n bits of the encoded data to the m bits of the data in accordance with the recovered clock; and

outputting a gray scale voltage in accordance with the decoded data,

wherein in the at least one translation table, the larger the amplitude of the gray scale voltage of a bit pattern in 2^m pieces of bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in 2ⁿ pieces of bit patterns of the n bits of the data, and

wherein only one translation table for a normally black mode or for a normally white mode is used as the at least one translation table, the data before encoding is regularly converted or inversely converted in accordance with a first display mode signal, and the data after decoding is regularly converted or inversely converted in accordance with a second display mode signal.

8. The method of transmitting a data for a display device according to claim 7, wherein the at least one translation table comprises a first translation table for the normally black mode and is used as the at least one translation table, the larger the data value of the bit pattern in the 2^m pieces of the bit patterns of the n bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in the 2ⁿ pieces of the bit patterns of the n bits of the data by the first translation table.

9. The method of transmitting a data for a display device according to claim 8, wherein the at least one translation table comprises a second translation table for the normally white mode and is used as the at least one translation table, and the smaller the data value of the bit pattern in the 2^m pieces of the bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in the 2ⁿ piece of the bit patterns of the n bits of the data by the second translation table.

10. The method of transmitting a data for a display device according to claim 7, wherein the first and the second display mode signals comprise signals indicating the normally black mode or the normally white mode.

11. A display device comprising:

an encoder having at least one translation table, and encoding m (m is a natural number) bits of a data to n (n is a natural number and n>

m) bits of a data on the basis of the at least one translation table;

a clock recovery circuit of recovering a clock from the data encoded by the encoder;

a decoder of decoding the n bits of the encoded data to the m bits of the data in accordance with the clock recovered by the clock recovery circuit;

an output driver of outputting a gray scale voltage in accordance with the data decoded by the decoder;

a display element having plurality of pixels applied with the gray scale voltage,

wherein in the translation table, the larger the amplitude of the gray scale voltage of a bit pattern in 2^m pieces of bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in 2ⁿ piece of bit patterns of the n bits of the data;

a data generating circuit of regularly converting or inversely converting the data inputted to the encoder in accordance with a first display mode signal; and

a data converter of regularly converting or inversely converting the data outputted from the decoder in accordance with a second display mode signal,

wherein the at least one translation table is only one translation table for a normally black mode or for a normally white mode.

12. The display device according to claim 11, wherein the encoder includes a first translation table for the normally black mode as the at least one translation table, and in the first translation table, the larger the data value of a bit pattern in 2^m pieces of bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in the 2ⁿ pieces of bit patterns of the n bits of the data.

13. The display device according to claim 11, wherein the encoder includes a second translation table for the normally white mode as the at least one translation table, and in the second translation table, the smaller the data value of a bit pattern in 2^m pieces of bit patterns of the m bits of the data, the larger the data change index of the bit pattern which is assigned to the bit pattern in the 2^m pieces of bit patterns in the 2ⁿ pieces of bit patterns of the n bits of the data.

14. The display device according to claim 11, further comprising:

a first register of storing the first display mode signal; and

a second register of storing the second display mode signal.

15. The display device according to claim 11, wherein the first and the second display mode signals comprise signals indicating the normally black mode or the normally white mode.

16. The display device according to claim 11, further comprising:

a parallel to serial converter of subjecting the encoded data outputted from the encoder to a parallel to serial conversion; and

a serial to parallel converter of subjecting the data outputted from the parallel to serial converter to a serial to parallel conversion.