Low-power policy for port

• US 9,049,151 B2
• Filed: 05/02/2013
• Issued: 06/02/2015
• Est. Priority Date: 10/07/2009
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Ding, Jin, Kwan, Bruce
• Primary Examiner(s): Hamza, Faruk
• Assistant Examiner(s): DECKER, CASSANDRA L
• Application Number:
  US13/886,039
• Publication Number:
  US 20130243007A1
• Time in Patent Office: 761 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3206 Monitoring of events, devices or parameters that trigger a change in power modality
• CPC Class Codes: G06F 1/325 Power saving in peripheral device
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: H04L 12/12 Arrangements for remote connection or disconnection of substations or of equipment thereof
• CPC Class Codes: H04L 43/0888 Throughput
• CPC Class Codes: H04L 43/16 Threshold monitoring
• CPC Class Codes: H04L 47/58 Changing or combining different scheduling modes, e.g. multimode scheduling
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Various example embodiments are disclosed. According to an example embodiment, a method may include determining, by a port processor, a buffer length based on an amount of data stored in a port controlled by the port processor, comparing the buffer length to a low-power buffer threshold, determining a link utilization based on a number of packets transmitted by the port, comparing the link utilization to a link utilization threshold, and placing the port into a low-power state based on the comparison of the buffer length to the low-power buffer threshold and the comparison of the link utilization to the link utilization threshold.

Claims

1. An apparatus comprising:

a port processor, the port processor being configured to;

compare a buffer length to a low-power buffer threshold, the buffer length being based on an amount of data stored for a port controlled by the port processor;

place the port into a low-power state based on the comparison of the buffer length to the low-power buffer threshold; and

when the port is in the low-power state;

remove the port from the low-power state based on either of the following conditions;

comparing the buffer length to a non-zero timer expiration buffer threshold upon expiration of an aging timer and while in the low-power state; and

comparing the buffer length to an active buffer threshold before the expiration of the aging timer, the active buffer threshold being different than the timer expiration buffer threshold.

2. The apparatus of claim 1, wherein the placing the port into the low-power state includes placing the port into the low-power state based on the buffer length being less than the low-power buffer threshold.

3. The apparatus of claim 1, wherein the placing the port into the low-power state includes instructing the port to cease transmission of packets.

4. The apparatus of claim 1, wherein the timer expiration buffer threshold is less than the active buffer threshold.

5. The apparatus of claim 1, wherein the port processor is included in the port, the port being configured to receive packets from a memory management unit.

6. The apparatus of claim 1, wherein the apparatus operates according to an IEEE 802.3az Energy Efficient Ethernet (EEE) protocol.

7. The apparatus of claim 1, wherein the port processor is further configured to:

compare a link utilization to a link utilization threshold, the link utilization being based on a number of packets transmitted by the port,

wherein the placing the port into the low-power state includes placing the port into the low-power state based on the comparison of the buffer length to the low-power buffer threshold and the comparing the link utilization to the link utilization threshold.

8. The apparatus of claim 1, further comprising a memory management unit, the memory management unit being configured to determine whether to forward packets to the port.

9. An apparatus comprising:

a port processor, the port processor being configured to;

compare a link utilization to a link utilization threshold, the link utilization being based on a number of packets transmitted by a port controlled by the port processor;

place the port into a low-power state based on the comparison of the link utilization to the link utilization threshold; and

when the port is in the low-power state;

remove the port from the low-power state based on either of the following conditions;

comparing a buffer length to a non-zero timer expiration buffer threshold upon expiration of an aging timer and while in the low-power state, the buffer length being based on an amount of data stored for the port controlled by the port processor; and

comparing the buffer length to an active buffer threshold before the expiration of the aging timer, the active buffer threshold being different than the timer expiration buffer threshold.

10. The apparatus of claim 9, wherein the placing the port into the low-power state includes placing the port into the low-power state based on the link utilization being less than the link utilization threshold.

11. The apparatus of claim 9, wherein the placing the port into the low-power state includes instructing the port to cease transmission of packets.

12. The apparatus of claim 9, wherein the timer expiration buffer threshold is less than the active buffer threshold.

13. The apparatus of claim 9, wherein the apparatus operates according to an IEEE 802.3az Energy Efficient Ethernet (EEE) protocol.

14. The apparatus of claim 9, wherein the port processor is further configured to:

compare a buffer length to a low-power buffer threshold, the buffer length being based on an amount of data stored for the port,

wherein the placing the port into the low-power state includes placing the port into the low-power state based on the comparison of the buffer length to the low-power buffer threshold and the comparing the link utilization to the link utilization threshold.

15. A non-transitory computer-readable storage medium comprising instructions stored thereon that, when executed by a port processor, are configured to cause the port processor to at least:

compare a buffer length to a low-power buffer threshold, the buffer length being based on an amount of data stored for a port controlled by the port processor;

place the port into a low-power state based on the comparison of the buffer length to the low-power buffer threshold; and

when the port is in the low-power state;

remove the port from the low-power state based on either of the following conditions;

comparing the buffer length to a non-zero timer expiration buffer threshold upon expiration of an aging timer and while in the low-power state; and

comparing the buffer length to an active buffer threshold before the expiration of the aging timer, the active buffer threshold being different than the timer expiration buffer threshold.

16. The storage medium of claim 15, wherein the placing the port into the low-power state includes placing the port into the low-power state based on the buffer length being less than the low-power buffer threshold.

17. The storage medium of claim 15, wherein the placing the port into the low-power state includes instructing the port to cease transmission of packets.

18. The storage medium of claim 15, wherein the timer expiration buffer threshold is less than the active buffer threshold.

19. The storage medium of claim 15, wherein the port processor operates according to an IEEE 802.3az Energy Efficient Ethernet (EEE) protocol.

20. The storage medium of claim 15, wherein the port processor is further configured to:

compare a link utilization to a link utilization threshold, the link utilization being based on a number of packets transmitted by the port,

wherein the placing the port into the low-power state includes placing the port into the low-power state based on the comparing the buffer length to the low-power buffer threshold and the comparing the link utilization to the link utilization threshold.