Flash memory with targeted read scrub algorithm

• US 9,053,808 B2
• Filed: 06/21/2012
• Issued: 06/09/2015
• Est. Priority Date: 06/21/2012
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Sprouse, Steven T., Bauche, Alexandra, Huang, Yichao, Chen, Jian, Huang, Jianmin, Lee, Dana
• Primary Examiner(s): Chu, Gabriel
• Assistant Examiner(s): CONTINO, PAUL F
• Application Number:
  US13/529,522
• Publication Number:
  US 20130346805A1
• Time in Patent Office: 1,083 Days
• Field of Search: 714/32, 714/42, 714/54, 365/200, 365/201, 365/222
• US Class Current: 1/1
• CPC Class Codes: G11B 20/18 Error detection or correction; Testing , e.g. of drop-outs
• CPC Class Codes: G11B 20/1883 Methods for assignment of alternate areas for defective areas
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step

Abstract

A method and system have been described for counteracting and correcting for read disturb effects in blocks of flash memory. The method may include the step of a controller of the memory system performing a read scrub scan on only a portion of one targeted word line in a block at desired intervals. The controller may calculate whether a read scrub scan is necessary based on a probabilistic determination that is calculated in response to each received host read command. The controller may then place a block associated with the targeted word line into a refresh queue if a number of errors are detected in the targeted word line that meets or exceeds a predetermined threshold. The block refresh process may include copying the data from the block into a new block during a background operation.

Claims

1. A method for counteracting read disturb effects in a flash memory device comprising:

in a controller of the flash memory device, the controller;

receiving a read command from a host;

determining if a scan for errors in a portion of the flash memory device is necessary in response to the read command; and

in response to determining that the scan is necessary;

identifying a word line of the flash memory to scan based on the received read command;

scanning only the identified word line for data errors, without scanning any other word line in a block containing the identified word line, wherein scanning only the identified word line comprises scanning only an upper page of the identified word line;

placing the block in a refresh queue if an error threshold is detected in the identified word line; and

if the error threshold is not detected in the identified word line, waiting for a next read command from the host.

2. The method of claim 1, wherein identifying the word line comprises retrieving a predetermined offset from non-volatile memory, the predetermined offset representing a fixed number of word lines away from a first or last word line associated with a received read command.

3. The method of claim 2, wherein the predetermined offset comprises a plurality of predetermined offsets and identifying the word line comprises selecting one of the predetermined offsets for use in locating the word line.

4. The method of claim 1, wherein determining if the scan for errors is necessary comprises determining if a scan frequency criteria has been met after each read command is received without using read counter information.

5. The method of claim 4, wherein determining if the scan frequency has been met comprises the controller executing a read scrub scan probability algorithm.

6. The method of claim 5, wherein the read scrub scan probability algorithm comprises the controller generating a random number in response to the read command, processing the generated random number through a modulo X operation, where X represents a predetermined frequency, and comparing a result of the modulo X operation to a predetermined number.

7. The method of claim 1, further comprising refreshing the block in the refresh queue during a background operation of the memory system.

8. The method of claim 7, wherein refreshing the block comprises copying data from the block into a new block.

9. The method of claim 1, wherein determining if the scan for errors in the portion of the flash memory device is necessary is done before the received read command is executed.

10. A memory system comprising:

non-volatile memory; and

a controller in communication with the non-volatile memory, the controller configured to;

receive a read command from a host;

determine if a scan for errors in of a portion of the flash memory device is necessary in response to the read command; and

in response to determining that the scan is necessary;

identify a word line of the flash memory to scan based on the received read command;

scan only the identified word line for data errors, without scanning any other word line in a block containing the identified word line, wherein the controller is further configured to scan only an upper page of the identified word line;

place the block in a refresh queue if an error threshold is detected in the identified word line; and

if the error threshold is not detected in the identified word line, wait for a next read command from the host.

11. The memory system of claim 10, wherein to identify the word line, the controller is configured to retrieve a predetermined offset from non-volatile memory, the predetermined offset representing a fixed number of word lines away from a first or last word line associated with the received read command.

12. The memory system of claim 11, wherein the predetermined offset comprises a plurality of predetermined offsets and the controller is configured to identify the word line by selecting one of the predetermined offsets.

13. The memory system of claim 10, wherein to determine if a scan for errors is necessary the controller is configured to determine if a scan frequency criteria has been met after each read command is received without using read counter information.

14. The memory system of claim 13, wherein the controller is further configured to execute a read scrub scan probability algorithm in order to determine if the scan frequency has been met.

15. The memory system of claim 10, wherein the controller is further configured to refresh the block in the refresh queue in a subsequent background operation.

16. The memory system of claim 15, wherein the controller is configured to refresh the block by copying data from the block into a new block.

17. The memory system of claim 10, wherein the controller is configured to determine if the scan for errors in the portion of the flash memory device is necessary before the received read command is executed.