Patterned strained semiconductor substrate and device

• US 9,053,970 B2
• Filed: 01/12/2010
• Issued: 06/09/2015
• Est. Priority Date: 07/23/2004
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: International Business Machines Corporation
• Inventors: Cheng, Kangguo, Divakaruni, Ramachandra
• Primary Examiner(s): REAMES, MATTHEW L
• Application Number:
  US12/686,040
• Publication Number:
  US 20100109049A1
• Time in Patent Office: 1,974 Days
• Field of Search: 257/18, 257/192, 257/324, 257/E29.193
• US Class Current: 1/1
• CPC Class Codes: H01L 21/823412 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/739 controlled by field-effect, e.g. bipolar static induction transistors [BSIT] unijunction transistors H01L29/705
• CPC Class Codes: H01L 29/78687 with a multilayer structure or superlattice structure

Abstract

A device that includes a pattern of strained material and relaxed material on a substrate, a strained device in the strained material, and a non-strained device in the relaxed material. The strained material may be silicon (Si) in either a tensile or compressive state, and the relaxed material is Si in a normal state. A buffer layer of silicon germanium (SiGe), silicon carbon (SiC), or similar material is formed on the substrate and has a lattice constant/structure mis-match with the substrate. A relaxed layer of SiGe, SiC, or similar material is formed on the buffer layer and places the strained material in the tensile or compressive state. Carbon-doped silicon or germanium-doped silicon may be used to form the strained material. The structure includes a multi-layered substrate having strained and non-strained materials patterned thereon.

Claims

1. An electrical device, comprising:

a pattern of strained material and relaxed material formed on a substrate;

a vertical insulating layer formed on sidewalls of a recess in the substrate;

a buffer layer formed within the sidewalls of a recess and directly on an interior portion of the substrate exposed by the recess, the buffer layer having a lattice constant/structure mismatch with the substrate; and

a relaxed layer formed within the sidewalls of the recess and directly on the buffer layer, a top surface of the relaxed layer placing the strained material in one of a tensile or a compressive state,

wherein;

the strained material is formed within the sidewalls of the recess and directly on the relaxed layer;

the relaxed layer comprises a material which has a lattice constant/structure mismatch with the strained material;

the relaxed material is different than the relaxed layer; and

a material forming the buffer layer increases in concentration from a base concentration proximate the substrate to a benchmark concentration proximate the relaxed layer.

2. The electrical device of claim 1, wherein a material that forms the insulating layer is one of an oxide and a nitride.

3. The electrical device of claim 1, wherein:

a portion of the substrate forms the relaxed material; and

the relaxed material is located outside a confine of the sidewalls of a recess and the vertical the insulating layer.

6. The electrical device of claim 1, wherein the relaxed layer and the buffer layer are selected from the group consisting of silicon carbon (SiC), silicon germanium (SiGe), Al_X1Ga_X2In_X3As_Y1P_Y2N_Y3Sb_Y4, where X1, X2, X3, Y1, Y2, Y3, and Y4 represent relative proportions, each greater than or equal to zero and X1+X2+X3+Y1+Y2+Y3+Y4=1, and Zn_A1Cd_A2Se_B1Te_B2, where A1, A2, B1, and B2 are relative proportions each greater than or equal to zero and A1+A2+B1+B2=1.

7. The electrical device of claim 1, wherein a material forming the relaxed layer has a second base concentration proximate the buffer layer that approximately equals the benchmark concentration.

8. The electrical device of claim 1, further comprising:

a strained device formed in the strained material; and

a non-strained device formed in the relaxed material.

9. The electrical device of claim 8, wherein the non-strained device is formed directly on the substrate.

10. The electrical device of claim 1, wherein:

the base concentration is at a bottom of the buffer layer; and

the benchmark concentration is at a top of the buffer layer.

11. The electrical device of claim 10, wherein the relaxed layer has a second base concentration at a bottom of the relaxed layer that approximately equals the benchmark concentration at the top of the buffer layer.

12. The electrical device of claim 11, wherein the relaxed layer comprises a material which has a lattice constant/structure mismatch with the strained material.

13. The electrical device of claim 12, wherein:

the buffer layer comprises multiple layers;

each of the multiple layers has a different concentration of a material such that the concentration of the material in the buffer layer incrementally increases in equal steps from a bottommost layer to a topmost layer of the multiple layers;

the bottommost layer of the multiple layers is at the bottom of the recess and has a base concentration;

the topmost layer of the multiple layers has the benchmark concentration.

14. The electrical device of claim 1, wherein:

the relaxed material is directly on the substrate; and

the relaxed material avoids contact with the buffer layer.

15. The electrical device of claim 1, wherein the pattern of strained material and relaxed material comprises a single epitaxially-grown layer formed within and without the insulating layer on the sidewalls of the recess.

16. The electrical device of claim 1, wherein a topmost surface of the strained material is coplanar with a topmost surface of the insulating layer and a topmost surface of the relaxed material.

17. The electrical device of claim 16, wherein a bottommost surface of the insulating layer is coplanar with a bottommost surface of the buffer layer.

4. An electrical device, comprising:

a pattern of strained material and relaxed material formed on a substrate;

a buffer layer formed on the substrate and having a lattice constant/structure mismatch with the substrate;

a relaxed layer formed on the buffer layer, a top surface of the relaxed layer placing the strained material in one of a tensile or a compressive state;

a recess formed in the substrate and enclosing the buffer layer, the recess having sidewalls; and

an insulating layer formed on the sidewalls,

wherein;

the relaxed layer comprises a material having a lattice constant/structure mismatch with the strained material;

the relaxed material is different than the relaxed layer;

a material forming the buffer layer increases in concentration from a base concentration proximate the substrate to a benchmark concentration proximate the relaxed layer; and

the buffer layer, the relaxed layer, and the strained material are formed in the recess within a confine of the insulating layer, and the relaxed material is formed outside the confine of the insulating layer.

5. The electrical device of claim 4, wherein the relaxed layer and the buffer layer are selected from the group consisting of silicon carbon (SiC), silicon germanium (SiGe), Al_X1 Ga_X2In_X3As_Y1P_Y2N_Y3Sb₄, where X1, X2, X3, Y1, Y2, Y3, and Y4 represent relative proportions, each greater than or equal to zero and X1+X2+X3+Y1+Y2+Y3+Y4=1, and Zn_A1Cd_A2Se_B1Te_B2, where A1, A2, B1, and B2 are relative proportions each greater than or equal to zero and A1+A2+B1+B2=1.