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Erase system and method of nonvolatile memory device

  • US 9,053,978 B2
  • Filed: 05/23/2012
  • Issued: 06/09/2015
  • Est. Priority Date: 07/12/2011
  • Status: Active Grant
First Claim
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1. An erase method of a nonvolatile memory device, the erase method comprising:

  • supplying an erase voltage to a plurality of memory cells;

    performing a read operation with a read voltage to word lines of the plurality of memory cells; and

    performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage, whereinthe plurality of memory cells comprises at least one dummy cell and one or more regular memory cells, and the at least one dummy cell is supplied with a voltage different from an operating voltage, which is supplied to the regular memory cells, in the reading operation and the erase verification operation.

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