Erase system and method of nonvolatile memory device
First Claim
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1. An erase method of a nonvolatile memory device, the erase method comprising:
- supplying an erase voltage to a plurality of memory cells;
performing a read operation with a read voltage to word lines of the plurality of memory cells; and
performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage, whereinthe plurality of memory cells comprises at least one dummy cell and one or more regular memory cells, and the at least one dummy cell is supplied with a voltage different from an operating voltage, which is supplied to the regular memory cells, in the reading operation and the erase verification operation.
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Abstract
An erase system and method of a nonvolatile memory device includes supplying an erase voltage to a plurality of memory cells of a nonvolatile memory, performing a read operation with a read voltage to word lines of the plurality of memory cells, and performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage.
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Citations
15 Claims
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1. An erase method of a nonvolatile memory device, the erase method comprising:
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supplying an erase voltage to a plurality of memory cells; performing a read operation with a read voltage to word lines of the plurality of memory cells; and performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage, wherein the plurality of memory cells comprises at least one dummy cell and one or more regular memory cells, and the at least one dummy cell is supplied with a voltage different from an operating voltage, which is supplied to the regular memory cells, in the reading operation and the erase verification operation. - View Dependent Claims (2, 3, 4, 5)
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6. An erase method of a nonvolatile memory device, the erase method comprising:
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supplying an erase voltage to a plurality of strings each having a plurality of memory cells; performing a read operation with a read voltage to word lines of the plurality of memory cells; determining one or more strings as an off strung string according to the performed read operation; processing an erase verification pass on the off string; and performing an erase verification operation with an erase verification voltage to word lines of the plurality of strings. - View Dependent Claims (7, 8, 9, 10)
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11. A memory system comprising:
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a nonvolatile memory device comprising a memory cell array having a substrate and a plurality of strings each having a plurality of memory cells, the plurality of strings formed on the substrate in a direction perpendicular to the substrate; and a controller to generate a command to perform an erase operation on the nonvolatile memory device, such that the nonvolatile memory device; erases the plurality of strings; performs a read operation with a read voltage to word lines of the plurality of memory cells; determines one or more strings as an off string according to the performed read operation; processes an erase verification pass on the off string; and performs an erase verification operation with an erase verification voltage to word lines of the plurality of strings, the erase verification voltage lower than the read voltage. - View Dependent Claims (12, 13, 14, 15)
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Specification