Semiconductor device and manufacturing method thereof

• US 9,054,205 B2
• Filed: 10/28/2013
• Issued: 06/09/2015
• Est. Priority Date: 11/05/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Nonaka, Yusuke, Omata, Takatsugu, Honda, Tatsuya, Miyanaga, Akiharu, Ohara, Hiroki
• Primary Examiner(s): Such, Matthew W
• Assistant Examiner(s): STOWE, SCOTT C
• Application Number:
  US14/064,294
• Publication Number:
  US 20140048801A1
• Time in Patent Office: 589 Days
• Field of Search: 257/43, 257/52, 257/57, 257/59, 257/E29.296
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/263 Amorphous materials
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

A semiconductor device having a novel structure or a method for manufacturing the semiconductor device is provided. For example, the reliability of a transistor which is driven at high voltage or large current is improved. For improvement of the reliability of the transistor, a buffer layer is provided between a drain electrode layer (or a source electrode layer) and an oxide semiconductor layer such that the end portion of the buffer layer is beyond the side surface of the drain electrode layer (or the source electrode layer) when seen in a cross section, whereby the buffer layer can relieve the concentration of electric field. The buffer layer is a single layer or a stacked layer including a plurality of layers, and includes, for example, an In—Ga—Zn—O film containing nitrogen, an In—Sn—O film containing nitrogen, an In—Sn—O film containing SiOx, or the like.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer;

a gate electrode overlapping with the oxide semiconductor layer; and

an insulating layer between the oxide semiconductor layer and the gate electrode,

wherein the gate electrode comprises a metal element, oxygen, and nitrogen, and

wherein the insulating layer comprises one material selected from the group consisting of a hafnium oxide, a tantalum oxide, an yttrium oxide, a hafnium silicate, a hafnium aluminate, a hafnium silicate to which nitrogen is added, and a hafnium aluminate to which nitrogen is added.

2. The semiconductor device according to claim 1, wherein the gate electrode is provided over the insulating layer.

3. The semiconductor device according to claim 1, wherein the gate electrode is provided under the insulating layer.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

5. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises one oxide semiconductor selected from the group consisting of In—

Zn-based oxide, a Sn—

Zn-based oxide, an Al—

Zn-based oxide, an In—

Ga-based oxide, an In—

Al—

Zn-based oxide, an In—

Sn—

Zn-based oxide, a Sn—

Ga—

Zn-based oxide, an Al—

Ga—

Zn-based oxide, a Sn—

Al—

Zn-based oxide, and an In—

Sn—

Ga—

Zn-based oxide.

6. The semiconductor device according to claim 1, wherein the material is a hafnium oxide.

7. The semiconductor device according to claim 1, wherein at least part of the oxide semiconductor layer comprises a crystalline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

8. The semiconductor device according to claim 7, wherein the oxide semiconductor layer is a non-single-crystal layer.

9. A semiconductor device comprising:

an oxide semiconductor layer comprising nitrogen;

a gate electrode overlapping with the oxide semiconductor layer; and

an insulating layer between the oxide semiconductor layer and the gate electrode,

wherein the gate electrode comprises a metal element, oxygen, and nitrogen, and

wherein the insulating layer comprises one material selected from the group consisting of a hafnium oxide, a tantalum oxide, an yttrium oxide, a hafnium silicate, a hafnium aluminate, a hafnium silicate to which nitrogen is added, and a hafnium aluminate to which nitrogen is added.

10. The semiconductor device according to claim 9, wherein the gate electrode is provided over the insulating layer.

11. The semiconductor device according to claim 9, wherein the gate electrode is provided under the insulating layer.

12. The semiconductor device according to claim 9, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

13. The semiconductor device according to claim 9, wherein the oxide semiconductor layer comprises one oxide semiconductor selected from the group consisting of In—

Zn-based oxide, a Sn—

Zn-based oxide, an Al—

Zn-based oxide, a Zn—

Mg-based oxide, a Sn—

Mg-based oxide, an In—

Mg-based oxide, an In—

Ga-based oxide, an In—

Al—

Zn-based oxide, an In—

Sn—

Zn-based oxide, a Sn—

Ga—

Zn-based oxide, an Al—

Ga—

Zn-based oxide, a Sn—

Al—

Zn-based oxide, an In—

Hf—

Zn-based oxide, an In—

La—

Zn-based oxide, an In—

Ce—

Zn-based oxide, an In—

Pr—

Zn-based oxide, an In—

Nd—

Zn-based oxide, an In—

Sm—

Zn-based oxide, an In—

Eu—

Zn-based oxide, an In—

Gd—

Zn-based oxide, an In—

Tb—

Zn-based oxide, an In—

Dy—

Zn-based oxide, an In—

Ho—

Zn-based oxide, an In—

Er—

Zn-based oxide, an In—

Tm—

Zn-based oxide, an In—

Yb—

Zn-based oxide, an In—

Lu—

Zn-based oxide, an In—

Sn—

Ga—

Zn-based oxide, an In—

Hf—

Ga—

Zn-based oxide, an In—

Al—

Ga—

Zn-based oxide, an In—

Sn—

Al—

Zn-based oxide, an In—

Sn—

Hf—

Zn-based oxide, and an In—

Hf—

Al—

Zn-based oxide.

14. The semiconductor device according to claim 9, wherein the material is a hafnium oxide.

15. The semiconductor device according to claim 9, wherein at least part of the oxide semiconductor layer comprises a crystalline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

16. The semiconductor device according to claim 15, wherein the oxide semiconductor layer is a non-single-crystal layer.

17. A semiconductor device comprising:

an oxide semiconductor layer;

a gate electrode overlapping with the oxide semiconductor layer;

an insulating layer between the oxide semiconductor layer and the gate electrode; and

a source or drain electrode electrically connected to the oxide semiconductor layer through a layer that comprises a metal element, oxygen, and nitrogen,

wherein the gate electrode comprises a metal element, oxygen, and nitrogen, and

wherein the insulating layer comprises one material selected from the group consisting of a hafnium oxide, a tantalum oxide, an yttrium oxide, a hafnium silicate, a hafnium aluminate, a hafnium silicate to which nitrogen is added, and a hafnium aluminate to which nitrogen is added.

18. The semiconductor device according to claim 17, wherein the gate electrode is provided over the insulating layer.

19. The semiconductor device according to claim 17, wherein the gate electrode is provided under the insulating layer.

20. The semiconductor device according to claim 17, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

21. The semiconductor device according to claim 17, wherein the oxide semiconductor layer comprises one oxide semiconductor selected from the group consisting of In—

Zn-based oxide, a Sn—

Zn-based oxide, an Al—

Zn-based oxide, a Zn—

Mg-based oxide, a Sn—

Mg-based oxide, an In—

Mg-based oxide, an In—

Ga-based oxide, an In—

Al—

Zn-based oxide, an In—

Sn—

Zn-based oxide, a Sn—

Ga—

Zn-based oxide, an Al—

Ga—

Zn-based oxide, a Sn—

Al—

Zn-based oxide, an In—

Hf—

Zn-based oxide, an In—

La—

Zn-based oxide, an In—

Ce—

Zn-based oxide, an In—

Pr—

Zn-based oxide, an In—

Nd—

Zn-based oxide, an In—

Sm—

Zn-based oxide, an In—

Eu—

Zn-based oxide, an In—

Gd—

Zn-based oxide, an In—

Tb—

Zn-based oxide, an In—

Dy—

Zn-based oxide, an In—

Ho—

Zn-based oxide, an In—

Er—

Zn-based oxide, an In—

Tm—

Zn-based oxide, an In—

Yb—

Zn-based oxide, an In—

Lu—

Zn-based oxide, an In—

Sn—

Ga—

Zn-based oxide, an In—

Hf—

Ga—

Zn-based oxide, an In—

Al—

Ga—

Zn-based oxide, an In—

Sn—

Al—

Zn-based oxide, an In—

Sn—

Hf—

Zn-based oxide, and an In—

Hf—

Al—

Zn-based oxide.

22. The semiconductor device according to claim 17, wherein the material is a hafnium oxide.

23. The semiconductor device according to claim 17, wherein at least part of the oxide semiconductor layer comprises a crystalline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

24. The semiconductor device according to claim 23, wherein the oxide semiconductor layer is a non-single-crystal layer.

25. A semiconductor device comprising:

a first insulating layer;

an oxide semiconductor layer over the first insulating layer;

a second insulating layer over the oxide semiconductor layer;

a gate electrode over the second insulating layer; and

wherein the first insulating layer comprises a hafnium oxide,

wherein the second insulating layer comprises a stack of a first layer comprising a hafnium oxide and a second layer comprising silicon and oxygen, and

wherein the oxide semiconductor layer comprises a non-single-crystal layer having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

26. The semiconductor device according to claim 25, wherein the gate electrode comprises a stack of a first conducive layer comprising metal and a second conductive layer comprising nitrogen.

27. The semiconductor device according to claim 25, wherein the oxide semiconductor layer comprises an In—

Ga—

Zn-based oxide semiconductor.

28. The semiconductor device according to claim 25, wherein the oxide semiconductor layer comprises one oxide semiconductor selected from the group consisting of In—

Zn-based oxide, a Sn—

Zn-based oxide, an Al—

Zn-based oxide, an In—

Ga-based oxide, an In—

Al—

Zn-based oxide, an In—

Sn—

Zn-based oxide, a Sn—

Ga—

Zn-based oxide, an Al—

Ga—

Zn-based oxide, a Sn—

Al—

Zn-based oxide, and an In—

Sn—

Ga-Zn-based oxide.

29. The semiconductor device according to claim 25, further comprising a pixel electrode electrically connected to the oxide semiconductor layer.