DC to AC conversion circuit with resonant circuit

• US 9,054,603 B2
• Filed: 03/18/2013
• Issued: 06/09/2015
• Est. Priority Date: 10/01/2012
• Status: Active Grant

• Current Assignee: Industrial Technology Research Institute
• Original Assignee: Industrial Technology Research Institute
• Inventors: Chen, Po-Yen, Pan, Ching-Tsai, Lin, Pao-Chuan, Yang, Ming-Che
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): Mehari, Yemane
• Application Number:
  US13/846,159
• Publication Number:
  US 20140092662A1
• Time in Patent Office: 813 Days
• Field of Search: 363/17, 363/21.02, 363/21.03, 363/98, 363/109, 363/123, 363/126, 363/127, 363/131, 363/132
• US Class Current: 1/1
• CPC Class Codes: H02M 1/0058 by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero using an auxiliary actively switched resonant commutation circuit connected to an intermediate DC voltage or between two push-pull branches of an inverter bridge H02M7/4811; in resonant inverters H02M7/4815; in inverters operating from a resonant DC source H02M7/4826
• CPC Class Codes: H02M 7/4815 Resonant converters H02M7/4811 and H02M7/4826 take precedence
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A DC to AC conversion circuit including an inverter, a first inductor, a first capacitor, a second inductor and a second capacitor is provided. The inverter has two input contact points and two output contact points. The input contact points receive a DC signal, and the output contact points output an AC signal. The first terminal of the first inductor is coupled to one of the two output contact points. The first capacitor is coupled to the first inductor in parallel. The first terminal of the second capacitor is coupled to the second terminal of the first inductor, and the second terminal of the second capacitor is coupled to another one of two output contact points. The first terminal of the second inductor is coupled to the first terminal of the second capacitor, and the second terminal of the second inductor is coupled to a load.

Claims

1. A DC to AC conversion circuit, comprising:

an inverter having two input contact points and two output contact points, the two input contact points receiving a DC signal, and the two output contact points outputting an AC signal;

a first inductor having a first terminal and a second terminal, and the first terminal of the first inductor coupled to one of the two output contact points of the inverter;

a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor coupled to the first terminal of the first inductor, and the second terminal of the first capacitor coupled to the second terminal of the first inductor;

a second capacitor having a first terminal and a second terminal, the first terminal of the second capacitor coupled to the second terminal of the first inductor, and the second terminal of the second capacitor coupled to another one of the two output contact points of the inverter and a load; and

a second inductor having a first terminal and a second terminal, the first terminal of the second inductor coupled to the first terminal of the second capacitor, and the second terminal of the second inductor coupled to the load;

wherein the AC signal is outputted to the first inductor and the first capacitor so as to store energy and to charge the second capacitor with the stored energy, and the inverter inverts a polarity of a voltage across the first capacitor by using a soft switching operation so as to transmit the stored energy to the load.

2. The DC to AC conversion circuit according to claim 1, wherein the DC signal is a DC voltage source.

3. The DC to AC conversion circuit according to claim 2, further comprising a third inductor coupled between one of the two output contact points of the inverter and the first terminal of the first inductor.

4. The DC to AC conversion circuit according to claim 1, wherein the DC signal is a DC current source.

5. The DC to AC conversion circuit according to claim 1, wherein an inductance of the first inductor is smaller than an inductance of the second inductor.

6. The DC to AC conversion circuit according to claim 1, wherein the inverter is a full-bridge inverter.

7. The DC to AC conversion circuit according to claim 6, wherein the inverter includes:

a first switch having a first terminal, a second terminal and a third terminal, the first terminal of the first switch receiving a first control signal, the second terminal of the first switch coupled to one of the two input contact points of the inverter, and the third terminal of the first switch coupled to one of the two output contact points of the inverter;

a second switch having a first terminal, a second terminal and a third terminal, the first terminal of the second switch receiving a second control signal, the second terminal of the second switch coupled to the second terminal of the first switch, and the third terminal of the second switch coupled to another one of the two output contact points of the inverter;

a third switch having a first terminal, a second terminal and a third terminal, the first terminal of the third switch receiving the second control signal, the second terminal of the third switch coupled to the third terminal of the first switch, and the third terminal of the third switch coupled to another one of the two input contact points of the inverter;

a fourth switch having a first terminal, a second terminal and a third terminal, the first terminal of the fourth switch receiving the first control signal, the second terminal of the fourth switch coupled to the third terminal of the second switch, and the third terminal of the fourth switch coupled to the third terminal of the third switch; and

four free-wheeling diodes reversely coupled to the first switch, the second switch, the third switch and the fourth switch in parallel respectively, the first control signal and the second control signal complementing each other in a period except a dead zone period in which the first control signal and the second control signal are at an off-logic level simultaneously.

8. The DC to AC conversion circuit according to claim 1, wherein the inverter is a half-bridge inverter.

9. The DC to AC conversion circuit according to claim 8, wherein the inverter includes:

a fifth switch having a first terminal, a second terminal and a third terminal, the first terminal of the fifth switch receiving a third control signal, the second terminal of the fifth switch coupled to one of the two input contact points of the inverter, and the third terminal of the fifth switch coupled to one of the two output contact points of the inverter;

a third capacitor having a first terminal and a second terminal, the first terminal of the third capacitor coupled to the second terminal of the fifth switch, and the second terminal of the third capacitor coupled to another one of the two output contact points of the inverter;

a sixth switch having a first terminal, a second terminal and a third terminal, the first terminal of the sixth switch receiving a fourth control signal, the second terminal of the sixth switch coupled to the third terminal of the fifth switch, and the third terminal of the sixth switch coupled to another one of the two input contact points of the inverter;

a fourth capacitor having a first terminal and a second terminal, the first terminal of the fourth capacitor coupled to the second terminal of the third capacitor, and the second terminal of the fourth capacitor coupled to the third terminal of the sixth switch; and

two free-wheeling diodes reversely coupled to the fifth switch and the sixth switch in parallel respectively, the third control signal and the fourth control signal complementing each other in a period except a dead zone period in which the third control signal and the fourth control signal are at an off-logic level simultaneously.