Realization of time-domain ultra wideband ground-penetrating radar using high speed accumulation and interpolated sampling
First Claim
1. A ground-penetrating radar transmitter and receiver comprising:
- an analog to digital converter (ADC), trigger logic, and programmable delay generator;
said trigger logic generating a series of randomly dithered trigger pulses;
said analog to digital converter producing a continuous stream of digital samples from analog data;
a processor constructing a measurement waveform comprised of a plurality of interdigitated linearly sampled sequences based on output of said trigger logic and said analog to digital converter;
said processor further offsetting each said sequence of said plurality of sequences by a time frame whose modulus is smaller than the sampling period of a single sampled sequence of said plurality of sampled sequences; and
whereinsaid measurement waveform is constructed from a plurality of iterations of constructing said interdigitated waveform from constituent sequences which form said interdigitated waveform;
said constructing is based on accumulation or averaging of said interdigitated waveforms; and
said accumulation or averaging incorporates interdigitated waveforms that were collected using equal representations of each core of said multi-core analog to digital converter (ADC), such that said ADC core'"'"'s interleaving error is canceled.
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Accused Products
Abstract
Embodiments of the disclosed technology use high-speed interpolated (interdigitated) sampling for the specific purpose of GPR (Ground-Penetrating RADAR). This technology solves several issues associated with high-speed sampling in GPR which included 1) dynamic range limitations, 2) regulatory compliance issues, 3) sampler core offset error, and 4) timing errors. High-speed interpolated sampling GPR is implemented using a high-speed ADC in combination with trigger logic (such as an FPGA) and a programmable delay generator. The FPGA or other trigger logic generates a series of randomly dithered trigger pulses. A variable delay generator (or “Vernier”) is synchronously controlled in order to produce the fractional timing. The timing of the pulses is randomly or pseudo-randomly dithered, and the phase of the interpolation is shuffled in order to avoid producing discrete spectral lines in the radiated RADAR signal.
27 Citations
16 Claims
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1. A ground-penetrating radar transmitter and receiver comprising:
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an analog to digital converter (ADC), trigger logic, and programmable delay generator; said trigger logic generating a series of randomly dithered trigger pulses; said analog to digital converter producing a continuous stream of digital samples from analog data; a processor constructing a measurement waveform comprised of a plurality of interdigitated linearly sampled sequences based on output of said trigger logic and said analog to digital converter; said processor further offsetting each said sequence of said plurality of sequences by a time frame whose modulus is smaller than the sampling period of a single sampled sequence of said plurality of sampled sequences; and
whereinsaid measurement waveform is constructed from a plurality of iterations of constructing said interdigitated waveform from constituent sequences which form said interdigitated waveform; said constructing is based on accumulation or averaging of said interdigitated waveforms; and said accumulation or averaging incorporates interdigitated waveforms that were collected using equal representations of each core of said multi-core analog to digital converter (ADC), such that said ADC core'"'"'s interleaving error is canceled. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of producing a waveform using a ground-penetrating radar transmitter and receiver, comprising the following steps:
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obtaining a plurality of interdigitated linearly sampled sequences by transmitting a plurality of pulses into the ground using said transmitter; using a processor or analog to digital converter to offset each said sequence of said plurality of linearly sampled sequences by a time frame smaller than the sampling period of a single-sampled sequence of said plurality of sampled sequences; constructing a measurement waveform based on said plurality of interdigitated linearly sampled sequences and displaying said measurement waveform on a display;
whereinconstructing from a plurality of iterations of constructing said interdigitated waveform from constituent sequences which form said interdigitated waveform; said constructing being based on accumulation or averaging of said interdigitated waveforms; and said accumulation or averaging incorporates interdigitated waveforms that were collected using equal representations of each core of a multi-core analog to digital converter (ADC), such that said ADC core'"'"'s interleaving error is canceled. - View Dependent Claims (12, 13, 14, 15, 16)
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Specification