Satisfying memory ordering requirements between partial reads and non-snoop accesses
First Claim
1. An apparatus comprising:
- receiving logic to receive a snoop invalidate message referencing data;
cache memory including a cache line to hold the data; and
protocol logic coupled to the receiving logic and the cache memory, the protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line being held in a first cache coherency state, to generate a writeback of the data to a home node associated with the data and to initiate a transition of the cache line from the first cache coherency state to an invalid cache coherency state, wherein the protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line being held in an Exclusive or Shared state, is to provide a Response Invalidate message to a home node associated with the data.
0 Assignments
0 Petitions
Accused Products
Abstract
A method and apparatus for preserving memory ordering in a cache coherent link based interconnect in light of partial and non-coherent memory accesses is herein described. In one embodiment, partial memory accesses, such as a partial read, is implemented utilizing a Read Invalidate and/or Snoop Invalidate message. When a peer node receives a Snoop Invalidate message referencing data from a requesting node, the peer node is to invalidate a cache line associated with the data and is not to directly forward the data to the requesting node. In one embodiment, when the peer node holds the referenced cache line in a Modified coherency state, in response to receiving the Snoop Invalidate message, the peer node is to writeback the data to a home node associated with the data.
-
Citations
19 Claims
-
1. An apparatus comprising:
-
receiving logic to receive a snoop invalidate message referencing data; cache memory including a cache line to hold the data; and protocol logic coupled to the receiving logic and the cache memory, the protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line being held in a first cache coherency state, to generate a writeback of the data to a home node associated with the data and to initiate a transition of the cache line from the first cache coherency state to an invalid cache coherency state, wherein the protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line being held in an Exclusive or Shared state, is to provide a Response Invalidate message to a home node associated with the data. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A method comprising:
-
receiving at receiving logic a snoop invalidate message referencing data; storing the data in a cache line of cache memory; generating, at protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line of cache memory being held in a first cache coherency state, a writeback of the data to a home node associated with the data and initiating a transition of the cache line from the first cache coherency state to an invalid cache coherency state, the protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line being held in an Exclusive or Shared state, providing a Response Invalidate message to a home node associated with the data. - View Dependent Claims (9, 10, 11, 12)
-
-
13. A system comprising:
-
a processor coupled to cache memory; receiving logic to receive a snoop invalidate message referencing data; the cache memory including a cache line to hold the data; and protocol logic coupled to the receiving logic and the cache memory, the protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line being held in a first cache coherency state, to generate a writeback of the data to a home node associated with the data and to initiate a transition of the cache line from the first cache coherency state to an invalid cache coherency state, wherein the protocol logic, in response to the receiving logic receiving the snoop invalidate message referencing the data and the cache line being held in an Exclusive or Shared state, is to provide a Response Invalidate message to a home node associated with the data. - View Dependent Claims (14, 15, 16, 17, 18, 19)
-
Specification