Method for estimating the lifespan of a deep-sub-micron integrated electronic circuit

• US 9,058,574 B2
• Filed: 06/30/2010
• Issued: 06/16/2015
• Est. Priority Date: 07/01/2009
• Status: Expired due to Fees

• Current Assignee: European Aeronautic Defence and Space Company EADS France (Airbus SE)
• Original Assignee: European Aeronautic Defence and Space Company EADS France (Airbus SE)
• Inventors: Moliere, Florian, Foucher, Bruno
• Primary Examiner(s): TSAI, CAROL S W
• Application Number:
  US13/381,112
• Publication Number:
  US 20120143557A1
• Time in Patent Office: 1,812 Days
• Field of Search: 702/117, 702/182, 702/184, 703/2, 703/6, 703/13, 703/14, 716/136, 324/762.01
• US Class Current: 1/1
• CPC Class Codes: G01R 31/2855 Environmental, reliability or burn-in testing
• CPC Class Codes: G06F 2119/10 Noise analysis or noise optimisation
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: G06Q 10/06 Resources, workflows, human or project management; Enterprise or organisation planning; Enterprise or organisation modelling

Abstract

A method for estimating the lifetime of a deep-submicron-generation integrated electronic component, linked to a wear mechanism occurring in previously defined special conditions of use, said component being of a deep submicron type, with very large-scale integration, commercially available off the shelf, wherein one assumes that the same sample population always experiences a failure due to: the most predominant failure mechanism, during the period of useful life, described by an exponential law, and the most critical wear mechanism, represented by a Weibull distribution at the end of the previous period.

Claims

1. A method for estimating the lifetime of a deep-submicron-generation integrated electronic component, linked to a wear mechanism occurring in previously defined special conditions of use, said component being of a deep submicron type, with very large-scale integration, commercially available off the shelf, wherein it is assumed that the same sample population always experiences a failure due to the most predominant failure mechanism, during the period of useful life, described by an exponential law, and the most critical wear mechanism, represented by a Weibull distribution at the end of the previous period, the method comprising:

receiving and storing predefined elements of technical information about the component, including the power supply voltage, technological data, a technical description of the encapsulation and the addressing data for the component,

analyzing the component'"'"'s sensitivity with regard to specific conditions of use,

selecting the most critical bottom of the bath and wear mechanisms, and associated accelerated tests,

calculating an estimated lifetime for the component in test conditions, and

determining an acceleration factor used for analyzing the results of at least one accelerated test of the component,

wherein, when calculating the estimated lifetime for the component in test conditions, the probability of failures is described by a bimodal distribution (Eq.

     1) in which λ

_TEST is the failure rate under test conditions, TTF<sub>TEST—

R %</sub> the mean value of the time to failure for components that have survived after t=t_TEST and β

the Weibull slope of the wear mechanism;

2. The method of claim 1, further comprising acquiring and storing the results of at least one accelerated test of the component'"'"'s lifetime, if such test results are not otherwise available;

the type of test is chosen according to a mechanism of failure by wear.

3. The method of claim 1, further comprising studying the component using a process of reverse engineering, so as to determine a theoretical failure rate (λ

).

4. The method of claim 1, further comprising establishing an identity card for the component according to a series of predefined criteria including technology and failure mechanisms inherent in the technology.

5. The method of claim 1, further comprising characterizing environmental data corresponding to the specific conditions of use planned for the component, including an electrical and thermal mission profile.

6. The method of claim 1, further comprising identifying failure mechanisms observed at the time of failures under test conditions.

7. The method of claim 1, further comprising calculating the observed failure rate λ

_TEST under test conditions.

8. The method of claim 1, further comprising calculating the effective failure rates λ

_APPLI and lifetime TTF_APPLI in use, according to the appropriate acceleration factor AF, from the failure rate λ

_TEST and lifetime TTF_TEST measured during the accelerated tests, by applying the formulas;