Amplifiers with multiple outputs and configurable degeneration inductor

• US 9,059,665 B2
• Filed: 02/22/2013
• Issued: 06/16/2015
• Est. Priority Date: 02/22/2013
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Youssef, Ahmed A., Chang, Li-Chung
• Primary Examiner(s): Nguyen, Khanh V
• Application Number:
  US13/775,036
• Publication Number:
  US 20140240048A1
• Time in Patent Office: 844 Days
• Field of Search: 330/98, 330/133, 330/150, 330/252, 330/253, 330/282, 330/296, 330/301, 330/310
• US Class Current: 1/1
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 2200/111 the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/489 A coil being added in the source circuit of a common source stage, e.g. as degeneration means
• CPC Class Codes: H03F 2200/541 Transformer coupled at the output of an amplifier
• CPC Class Codes: H03F 3/16 with field-effect devices
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H03G 1/0052 using diodes

Abstract

Multi-output amplifiers with configurable source degeneration inductance and having good performance are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a gain transistor and a configurable degeneration inductor for an amplifier. The gain transistor receives an input signal and provides an amplified signal. The amplifier provides a single output signal in a first operating mode or a plurality of output signals in a second operating mode. The configurable degeneration inductor is coupled to the gain transistor and provides a first source degeneration inductance in the first operating mode or a second source degeneration inductance in the second operating mode. The second source degeneration inductance is less than the first source degeneration inductance and may be dependent on the number of output signals generated in the second operating mode.

Claims

1. An apparatus comprising:

a gain transistor of an amplifier, the gain transistor configured to receive an input signal and to provide an amplified signal, the amplifier configured to provide a single output signal based on a first operating mode and to provide a plurality of output signals based on a second operating mode;

a configurable degeneration inductor coupled to the gain transistor and configured to provide a first source degeneration inductance based on the first operating mode and to provide a second source degeneration inductance based on the second operating mode;

a first transistor coupled to the gain transistor; and

a second transistor coupled to the gain transistor.

2. The apparatus of claim 1, wherein the second source degeneration inductance is less than the first source degeneration inductance.

3. The apparatus of claim 1, wherein the configurable degeneration inductor comprises:

a first inductor coupled between a first node and ground, the first node coupled to the gain transistor;

a second inductor coupled between the first node and a second node; and

a shunt transistor coupled between the second node and ground.

4. The apparatus of claim 1, wherein the configurable degeneration inductor comprises:

a first inductor coupled between the gain transistor and a particular node;

a second inductor coupled between the particular node and circuit ground; and

a shunt transistor coupled between the particular node and ground.

5. The apparatus of claim 1, wherein the first transistor is configured to receive the amplified signal and to provide a first output signal, and wherein the second transistor is configured to receive the amplified signal and to provide a second output signal.

6. The apparatus of claim 1, wherein one of the first transistor and the second transistor is configured to be enabled based on the first operating mode, and wherein the first transistor and the second transistor are configured to be enabled based on the second operating mode.

7. The apparatus of claim 1, further comprising:

a second gain transistor configured to receive the input signal;

a third transistor coupled to the second gain transistor; and

a fourth transistor coupled to the second gain transistor, wherein one of the first transistor, the second transistor, the third transistor, and the fourth transistor is configured to provide the single output signal based on the first operating mode, and wherein at least two of the first transistor, the second transistor, the third transistor, and the fourth transistor are configured to provide the plurality of output signals based on the second operating mode.

8. The apparatus of claim 7, wherein a first source of the gain transistor and a second source of the second gain transistor are coupled together and coupled to the configurable degeneration inductor.

9. The apparatus of claim 1, further comprising:

a second gain transistor configured to receive a second input signal;

a third transistor coupled to the second gain transistor;

a fourth transistor coupled to the second gain transistor, wherein one of the first transistor, the second transistor, the third transistor, and the fourth transistor is configured to provide the single output signal based on the first operating mode, and wherein at least two of the first transistor, the second transistor, the third transistor, and the fourth transistor are configured to provide the plurality of output signals based on the second operating mode; and

a second configurable degeneration inductor coupled to the second gain transistor and configured to provide a third source degeneration inductance based on the first operating mode and to provide a fourth source degeneration inductance based on the second operating mode.

10. The apparatus of claim 1, wherein the gain transistor is configured to be biased by a first bias current based on the first operating mode and to be biased by a second bias current based on the second operating mode, the second bias current exceeding the first bias current.

11. The apparatus of claim 10, wherein a first variable gain of the gain transistor is based on the first bias current, wherein a second variable gain of the gain transistor is based on the second bias current, and wherein the first bias current, the second bias current, or both, are adjustable.

12. The apparatus of claim 1, further comprising:

an input matching circuit coupled to the gain transistor and configured to receive an input radio frequency (RF) signal and to provide the input RF signal to the gain transistor.

13. The apparatus of claim 12, wherein the input matching circuit comprises an inductor coupled between an input of the input matching circuit and an output of the input matching circuit.

14. A method of signal amplification comprising:

amplifying an input signal based on a first source degeneration inductance and generating a single output signal based on a first operating mode; and

amplifying the input signal based on a second source degeneration inductance and generating a plurality of output signals based on a second operating mode.

15. The method of claim 14, further comprising:

providing the first source degeneration inductance via a first inductor; and

providing the second source degeneration inductance via a parallel combination of the first inductor and a second inductor.

16. The method of claim 14, further comprising:

providing the first source degeneration inductance via a series combination of a first inductor and a second inductor; and

providing the second source degeneration inductance via the first inductor.

17. The method of claim 14, further comprising:

amplifying a second input signal based on a third source degeneration inductance based on the first operating mode to provide a second amplified signal; and

amplifying the second input signal based on a fourth source degeneration inductance based on the second operating mode to provide a second amplified signal, wherein the single output signal or at least one output signal of the plurality of output signals is based on the second amplified signal.

18. An apparatus comprising:

means for amplifying an input signal to provide an amplified signal;

means for providing a first source degeneration inductance based on a first operating mode and for providing a second source degeneration inductance based on a second operating mode;

means for selectively providing a first output signal based on the amplified signal, the means for selectively providing the first output signal coupled to the means for amplifying; and

means for selectively providing a second output signal based on the amplified signal, the means for selectively providing the second output signal coupled to the means for amplifying.

19. The apparatus of claim 18, wherein the means for providing the first source degeneration inductance and for providing the second source degeneration inductance comprises:

means for providing a first inductance coupled between a first node and ground, the first node coupled to the means for amplifying the input signal;

means for providing a second inductance coupled between the first node and a second node; and

means for shunting the second node to ground.

20. The apparatus of claim 18, further comprising:

means for amplifying a second input signal to provide a second amplified signal; and

means for providing a third source degeneration inductance based on the first operating mode and for providing a fourth source degeneration inductance based on the second operating mode.