System and method of streaming 3-D wireframe animations
First Claim
Patent Images
1. A method comprising:
- processing, via a processor, different parameters n, FR, Sp, and FBOP in a channel bitrate algorithm that applies to a block-of-packets structure for each layer of a plurality of layers of video data, the channel bitrate algorithm comprising;
R=(N*FR*Sp)/FBOP,wherein R is a bitrate, n is a number of lines in the block-of-packets structure, Sp is a number of columns in the block-of-packets structure, FR is a sequence frame rate, and FBOP is a number of data frames in the block-of-packets structure for a respective layer of the plurality of layers; and
applying via the processor, unequal error protection to each respective layer of the plurality of layers according to a result of the channel bitrate algorithm.
4 Assignments
0 Petitions
Accused Products
Abstract
Optimal resilience to errors in packetized streaming 3-D wireframe animation is achieved by partitioning the stream into layers and applying unequal error correction coding to each layer independently to maintain the same overall bitrate. The unequal error protection scheme for each of the layers combined with error concealment at the receiver achieves graceful degradation of streamed animation at higher packet loss rates than approaches that do not account for subjective parameters such as visual smoothness.
31 Citations
20 Claims
-
1. A method comprising:
-
processing, via a processor, different parameters n, FR, Sp, and FBOP in a channel bitrate algorithm that applies to a block-of-packets structure for each layer of a plurality of layers of video data, the channel bitrate algorithm comprising;
R=(N*FR*Sp)/FBOP,wherein R is a bitrate, n is a number of lines in the block-of-packets structure, Sp is a number of columns in the block-of-packets structure, FR is a sequence frame rate, and FBOP is a number of data frames in the block-of-packets structure for a respective layer of the plurality of layers; and applying via the processor, unequal error protection to each respective layer of the plurality of layers according to a result of the channel bitrate algorithm. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A system comprising:
-
a processor; and a computer-readable storage medium having instructions stored which, when executed by the processor, cause the processor to perform operations comprising; processing different parameters n, FR, Sp, and FBOP in a channel bitrate algorithm that applies to a block-of-packets structure for each layer of a plurality of layers of video data, the channel bitrate algorithm comprising;
R=(N*FR*Sp)/FBOP,wherein R is a bitrate, n is a number of lines in the block-of-packets structure, Sp is a number of columns in the block-of-packets structure, FR is a sequence frame rate, and FBOP is a number of data frames in the block-of-packets structure for a respective layer of the plurality of layers; and applying unequal error protection to each respective layer of the plurality of layers according to a result of the channel bitrate algorithm. - View Dependent Claims (9, 10, 11, 12, 13, 14)
-
-
15. A computer-readable storage device having instructions stored which, when executed by a computing device, cause the computing device to perform operations comprising:
-
processing different parameters n, FR, Sp, and FBOP in a channel bitrate algorithm that applies to a block-of-packets structure for each layer of a plurality of layers of video data, the channel bitrate algorithm comprising;
R=(N*FR*Sp)/FBOP,wherein R is a bitrate, n is a number of lines in the block-of-packets structure, Sp is a number of columns in the block-of-packets structure, FR is a sequence frame rate, and FBOP is a number of data frames in the block-of-packets structure for a respective layer of the plurality of layers; and applying unequal error protection to each respective layer of the plurality of layers according to a result of the channel bitrate algorithm. - View Dependent Claims (16, 17, 18, 19, 20)
-
Specification