RFID tag dynamically adjusting clock frequency

• US 9,064,196 B1
• Filed: 05/02/2012
• Issued: 06/23/2015
• Est. Priority Date: 03/13/2008
• Status: Active Grant

• Current Assignee: Impinj, Inc.
• Original Assignee: Impinj, Inc.
• Inventors: Gutnik, Vadim, Cooper, Scott A., Hyde, John D., Stanford, Theron
• Primary Examiner(s): Obiniyi, Paul
• Application Number:
  US13/462,343
• Time in Patent Office: 1,147 Days
• Field of Search: 340 101- 106, 3405721-5729, 235375-385
• US Class Current: 1/1
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 7/016 Synchronisation of sensing process
• CPC Class Codes: G06K 7/10207 parameter settings related to power consumption of the interrogator
• CPC Class Codes: H04Q 2213/13095 PIN / Access code, authentication
• CPC Class Codes: H04Q 2213/13214 Clock signals

Abstract

An RFID tag is configured to adjust its current clock frequency to conserve tag power while receiving a reader signal and/or backscattering a signal. The tag may determine whether to adjust its current clock frequency based on one or more timing parameters, which may be determined from a reader command and/or from a signal to be backscattered. The counting rate and/or limit of a tag counter and/or the power supplied to a tag component may also be adjusted. The current tag clock frequency may be adjusted during the signal reception/backscattering process and optionally restored once the process is completed.

Claims

1. A method for a Radio Frequency Identification (RFID) tag to dynamically adjust a clock frequency of a tag oscillator, the method comprising:

receiving, during an R→

T communication session, two or more timing parameters from a reader, wherein the received two or more timing parameters include a TRcal value, an RTcal value, a DR value, a Tari value, or a BLF value;

calculating a symbol duration based on the received two or more timing parameters;

comparing the calculated symbol duration to a symbol decision threshold;

determining, based on the comparison, whether the clock frequency can be reduced;

if so then;

reducing the clock frequency; and

adjusting a counting rate of a counter and at least one of a divide ratio, bias, impedance, and conductance of the tag oscillator; and

otherwise not reducing the clock frequency.

2. The method of claim 1, further comprising subsequently restoring the clock frequency.

3. The method of claim 1, further comprising adjusting at least one of a counting rate and a limit of a tag counter.

4. A Radio Frequency Identification (RFID) integrated circuit (IC) configured to dynamically adjust a clock frequency of a tag oscillator, the IC comprising:

a transceiver configured to communicate with a reader; and

a processing block coupled to the transceiver and configured to;

receive, during an R→

T communication session, two or more timing parameters from the reader, wherein the received two or more timing parameters include a TRcal value, an RTcal value, a DR value, a Tari value, or a BLF value;

calculate a symbol duration based on the received two or more timing parameters;

compare the calculated symbol duration to a symbol decision threshold;

determine, based on the, whether the clock frequency can be reduced;

if so, then;

reduce the clock frequency; and

adjust a counting rate of a counter and at least one of a divide ratio, bias, impedance, and conductance of the tag oscillator; and

otherwise not reduce the clock frequency.

5. The IC of claim 4, wherein the processing block is further configured to restore the clock frequency.

6. The IC of claim 4, wherein the processing block is further configured to adjust at least one of a counting rate and a limit of a tag counter.