Advanced faraday shield for a semiconductor device

• US 9,064,868 B2
• Filed: 10/12/2012
• Issued: 06/23/2015
• Est. Priority Date: 10/12/2012
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Liu, Yanxiang, Vakada, Vara, Ciavatti, Jerome
• Primary Examiner(s): Stark, Jarrett
• Assistant Examiner(s): Hoque, Mohammad M
• Application Number:
  US13/650,233
• Publication Number:
  US 20140103420A1
• Time in Patent Office: 984 Days
• Field of Search: 257/340, 257/386, 257/659
• US Class Current: 1/1
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/66659 with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

One illustrative device disclosed herein includes a transistor comprising a gate electrode and a drain region formed in a semiconducting substrate, an isolation structure formed in the substrate, wherein the isolation structure is laterally positioned between the gate electrode and the drain region, and a Faraday shield that is positioned laterally between the gate electrode and the drain region and above the isolation structure, wherein the Faraday shield has a long axis that is oriented substantially vertically relative to an upper surface of the substrate.

Claims

1. An integrated circuit device, comprising:

a transistor comprising a gate electrode and a drain region formed in a semiconducting substrate;

an isolation structure formed in said substrate, said isolation structure being laterally positioned between said gate electrode and said drain region; and

a Faraday shield that is positioned laterally between said gate electrode and said drain region and above said isolation structure, wherein said Faraday shield is comprised of a plurality of vertically stacked conductive features, wherein each of said plurality of vertically stacked conductive features is positioned in a separate layer of insulating material.

2. The device of claim 1, wherein said plurality of vertically stacked conductive features are discrete, separated conductive contacts or continuous line-type features.

3. The device of claim 1, wherein said plurality of vertically stacked conductive features is comprised of three levels of conductive features and wherein each of said three levels is comprised of a plurality of discrete, separated conductive contacts or at least one continuous line-type feature.

4. The device of claim 1, further comprising a source/drain conductor that is conductively coupled to said drain region, a source/drain contact that is conductively coupled to said source/drain conductor and wherein said plurality of vertically stacked conductive features correspond to said source/drain conductor and said source/drain contact.

5. The device of claim 1, further comprising a metal-1 layer that contains a metal-1 type Faraday shield that is positioned above said gate electrode.

6. The device of claim 5, wherein said Faraday shield is conductively coupled to said metal-1 type Faraday shield.

7. The device of claim 5, wherein said device further comprises a source region formed in said substrate, and wherein said Faraday shield and said metal-1 type Faraday shield are conductively coupled to said source region.

8. An integrated circuit device, comprising:

a transistor comprising a gate electrode and a drain region formed in a semiconducting substrate;

a source/drain conductor that is conductively coupled to said drain region, said source/drain conductor having a structure and configuration;

a source/drain contact that is positioned above and conductively coupled to said source/drain conductor, said source/drain contact having a structure and configuration;

an isolation structure formed in said substrate, said isolation structure being laterally positioned between said gate electrode and said drain region;

a Faraday shield that is positioned laterally between said gate electrode and said drain region, wherein said Faraday shield is comprised of first, second and third vertically stacked conductive features, wherein said first vertically stacked feature has the same structure and configuration as said said source/drain conductor and said second vertically stacked feature has the same structure and configuration as said source/drain contact; and

a conductive via that is conductively coupled to said source/drain contact, said conductive via having a structure and configuration, wherein said third vertically stacked conductive feature of said Faraday shield has the same structure and configuration as said conductive via.

9. The device of claim 8, further comprising a metal-1 layer that contains a metal-1 type Faraday shield that is positioned above said gate electrode.

10. The device of claim 9, wherein said Faraday shield is conductively coupled to said metal-1 type Faraday shield.

11. The device of claim 8, wherein said Faraday shield contacts said isolation structure.

12. The device of claim 8, wherein said Faraday shield contacts an insulating material positioned between said Faraday shield and said isolation structure.

13. The device of claim 9, wherein said Faraday shield is positioned above said isolation region and wherein said Faraday shield has a long axis that is oriented substantially vertically relative to an upper surface of said substrate.

14. An integrated circuit device, comprising:

a transistor comprising a gate electrode and a drain region formed in a semiconducting substrate;

a metal-1 metallization layer that comprises a metal-1 type Faraday shield that is positioned above said gate electrode;

a plurality of drain conductive features that are positioned below said metal-1 metallization layer and conductively coupled to said drain region, wherein said plurality of drain conductive features collectively have a structure and configuration;

an isolation structure formed in said substrate, said isolation structure being laterally positioned between said gate electrode and said drain region; and

a Faraday shield that is positioned laterally between said gate electrode and said drain region and contacts said isolation region, wherein said Faraday shield is conductively coupled to said metal-1 type Faraday shield and wherein said Faraday shield is comprised of vertically stacked conductive features drain conductive features that collectively have the same structure and configuration as said plurality of drain conductive features.

15. The device of claim 14, wherein said Faraday shield is conductively coupled to a source region formed in said substrate.

16. An integrated circuit device, comprising:

a transistor comprising a gate electrode and a drain region formed in a semiconducting substrate;

a source/drain conductor that is conductively coupled to said drain region, said source/drain conductor having a structure and configuration;

a source/drain contact that is positioned above and conductively coupled to said source/drain conductor, said source/drain contact having a structure and configuration;

an isolation structure formed in said substrate, said isolation structure being laterally positioned between said gate electrode and said drain region; and

a Faraday shield that is positioned laterally between said gate electrode and said drain region, wherein said Faraday shield is comprised of first and second vertically stacked conductive features, wherein said first vertically stacked feature has the same structure and configuration as said source/drain conductor and said second vertically stacked feature has the same structure and configuration as said source/drain contact, wherein said Faraday shield contacts an insulating material positioned between said Faraday shield and said isolation structure.