Multiple gate transistor architecture providing an accessible inner source-drain node
First Claim
1. A transistor circuit comprising:
- a first multiple gate transistor comprising;
a source structure having a plurality of source fingers extending from a source bus;
a drain structure having plurality of drain fingers extending from a drain bus and interleaved with the plurality of source fingers wherein a meandering path is formed between the source and drain structures;
a plurality of gate structures that are substantially parallel with one another and extend along the meandering path between the source and drain structures, wherein at least one of the plurality of gate structures extends continuously along the meandering path;
a source-drain structure that extends along the meandering path between adjacent ones of the plurality of gate structures to form a source-drain node; and
a source-drain extension that is electrically connected to the source-drain structure and externally accessible; and
control circuitry adapted to provide control signals to corresponding one of the plurality of gate structures and to provide the source drain node via the source drain extension.
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Accused Products
Abstract
The present invention provides a multiple gate transistor architecture that provides an accessible inner source-drain (SD) node. The transistor architecture includes a source structure having multiple source fingers, which extend from a source bus, and a drain structure having multiple drain fingers, which extend from a drain bus. The fingers of the respective source and drain structures are interleaved wherein a meandering path is formed between the source and drain structures. Two or more gate structures run substantially parallel to one another along the meandering path between the source and drain structures. An SD structure is provided between each adjacent pair of gate structures and runs along the meandering path to form the SD node. An SD extension is coupled to the SD structure and accessible by other circuitry to allow a signal to be applied to the SD structure during operation.
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Citations
17 Claims
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1. A transistor circuit comprising:
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a first multiple gate transistor comprising; a source structure having a plurality of source fingers extending from a source bus; a drain structure having plurality of drain fingers extending from a drain bus and interleaved with the plurality of source fingers wherein a meandering path is formed between the source and drain structures; a plurality of gate structures that are substantially parallel with one another and extend along the meandering path between the source and drain structures, wherein at least one of the plurality of gate structures extends continuously along the meandering path; a source-drain structure that extends along the meandering path between adjacent ones of the plurality of gate structures to form a source-drain node; and a source-drain extension that is electrically connected to the source-drain structure and externally accessible; and control circuitry adapted to provide control signals to corresponding one of the plurality of gate structures and to provide the source drain node via the source drain extension. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15)
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12. A multiple gate transistor comprising:
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a source structure having a plurality of source fingers extending from a source bus; a drain structure having plurality of drain fingers extending from a drain bus and interleaved with the plurality of source fingers wherein a meandering path is formed between the source and drain structures, a plurality of gate structures that are substantially parallel with one another and extend along the meandering path between the source and drain structures; a source-drain structure that extends along the meandering path between adjacent ones of the plurality of gate structures to form a source-drain node; and a source-drain extension that is electrically connected to the source-drain structure and externally accessible to facilitate electrical connections to associated circuitry, wherein at least one signal from the associated circuitry is applied to the source-drain node via the source-drain extension, wherein at least one of the plurality of gate structures extends continuously along the meandering path; wherein the source-drain structure is formed from a plurality of source-drain segments that are serially aligned along a significant majority of the meandering path between the adjacent ones of the plurality of gate structures, and the source-drain extension is electrically coupled to each of the plurality of source-drain segments. - View Dependent Claims (16, 17)
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Specification