Method for checking data consistency in a system on chip

• US 9,069,953 B2
• Filed: 03/15/2011
• Issued: 06/30/2015
• Est. Priority Date: 03/19/2010
• Status: Active Grant

• Current Assignee: Nagravision SA (Kudelski SA)
• Original Assignee: Nagravision SA (Kudelski SA)
• Inventors: Bellocchio, Marc, Gogniat, Christophe
• Primary Examiner(s): BUTLER, SARAI E
• Application Number:
  US13/064,262
• Publication Number:
  US 20110231709A1
• Time in Patent Office: 1,568 Days
• Field of Search: 714/10
• US Class Current: 1/1
• CPC Class Codes: G06F 11/0724 in a multiprocessor or a multi-core unit multiprocessors per se G06F15/80
• CPC Class Codes: G06F 11/0751 Error or fault detection not based on redundancy power supply failures G06F1/30; network fault management H04L41/06
• CPC Class Codes: G06F 21/55 Detecting local intrusion or implementing counter-measures

Abstract

The invention aims to provide a method and a system on chip able to detect at once hardware and software errors to prevent manipulations for retrieving cryptographic keys, inserting or suppressing instructions to bypass security processes, modifying programs or memory content etc. The system on chip comprises a core including at least two processors, registers, and a data consistency check module. The core is connected to at least one set of memories containing zones for instructions of a first program and of a second program, said instructions being to be executed respectively by the first and second processor, which respectively produce and store result data into the registers and the memories. The data consistency check module is configured to verify conformity of the produced result data by comparing a test result obtained by carrying out a predetermined function F over one of the first or second result data with the corresponding second or first result data and to continue execution of instructions of each program when the comparison is successful, or stop execution when the comparison shows an error.

Claims

1. A method for checking data consistency in a system on chip comprising a core including at least two processors, registers, and a data consistency check module linking the two processors, the core being configured to connect to at least one set of memories containing program zones for first instructions of a first program and program zones for second instructions of a second program, each program being configured to access data stored in data zones of the memories, said first and second instructions to be executed by the first and second processor, respectively, to produce and store result data into the registers or the memories, the method comprising:

executing at least one instruction of the first program by the first processor to produce first result data,

executing at least one instruction of the second program by the second processor to produce second result data distinct from the first result data,

applying, by the data consistency check module, a function either over the first result data or the second result data to obtain a test result, wherein the applying a function applies one of a logical operation, a mathematical function, and a cryptographic function such that the obtained test result is a modified version of one of the first result data and the second result data,

comparing, by the data consistency check module, the obtained test result either with the corresponding second result data or first result data,

continuing execution of instructions of each program by the first and second processor when the comparison between the test result and the corresponding result data is successful, and

stopping execution of instructions of each program by the first and second processor when the comparison shows an error.

2. The method according to claim 1, wherein the stopping stops the execution of the program by the processors at the first error occurred during comparison of the result data and the corresponding test results.

3. The method according to claim 1, further comprising:

activating or deactivating the data consistency check module by a specific instruction included in the first or second program executed by a corresponding one of the first and second processors,

determining, if the data consistency check module is activated, a mode of synchronized functioning of the first and second processors, and

determining, if the deactivated data consistency check module is deactivated, mode of independent functioning of said first and second processors.

4. The method according to claim 1, wherein the executing of at least one instruction of the first program by the first processor is synchronized with the executing of at least one instruction of the second program by the second processor, and the comparing result data with the corresponding test results occurs at each instruction execution.

5. The method according to claim 1, wherein the result data produced by the second instructions of the second program executed by the second processor are stored at memory or register addresses defined by a mapping applied on each memory or register address where the corresponding result data produced by the first instructions of the first program executed by the first processor are stored.

6. The method according to claim 5, wherein the mapping comprises a shift between the addresses where the first result data are stored and the addresses where the second result data are stored.

7. The method according to claim 5, wherein the mapping comprises a function relating the addresses where the first result data are stored and the addresses where the second result data are stored.

8. The method according to claim 5, further comprising:

determining the memory or register addresses of the result data and identifying, by the data consistency check module, suitable result data to verify, said determining and identifying being carried out before the applying a function.

9. The method according to claim 1, wherein the first and the second program include instructions with the same statements but using different variables.

10. The method according to claim 1, wherein the first and the second program include instructions which statements and variables are specific to the type of a corresponding one of the first second processors.

11. The method according to claim 1, wherein the first and the second program include instructions which statements and variables are specific to the type of processor, the result data produced by the executing the instructions being related by the function.

12. A system on chip, comprising:

a core including,

at least two processors,

registers, and

a data consistency check module linking the two processors, the core being configured to connect to at least one set of memories containing zones for first instructions of a first program and zones for second instructions of a second program, each program being configured to access data stored in data zones of the memories, said first and second instructions to be executed by the first and second processor, respectively, to produce and store result data into the registers or the memories, wherein,

the first processor is configured to execute at least one instruction of the first program to produce first result data,

the second processor is configured to execute at least one instruction of the second program to produce second result data distinct from the first result data,

the data consistency check module is configured to obtain a test result by applying a function either over the first result data or the second result data, and to compare said test result either with the corresponding second result data or first result data, wherein the data consistency check module is configured to apply one of a logical operation, a mathematical function, and a cryptographic function as the function such that the obtained test result is a modified version of one of the first result data and the second result data, and

the data consistency check module is configured to continue execution of instructions of each program by the first and second processor when the comparison is successful, and stop execution of instructions of each program by the first and second processor when the comparison shows an error.

13. The system on chip according to claim 12, wherein the data consistency check module is configured to stop the execution of the program by the processors at the first error occurred during comparison of the result data and the corresponding test results.

14. The system on chip according to claim 12, further comprising a memory mapping module including a correspondence table or a function relating the addresses of memory or registers where the first and second result data are stored.

15. A method for checking data consistency in a system on chip comprising a core including at least two processors, registers, and a data consistency check module linking the two processors, the data consistency check module being configured to perform tests to determine if data produced by the at least two processors at execution of program instructions satisfy desired comparison criteria or pass consistency tests or other error detecting processes, the core being configured to connect to at least one set of memories containing program zones for first instructions of a first program and program zones for second instructions of a second program, each program being configured to access data stored in data zones of the memories, said first and second instructions to be executed by the first and second processor, respectively, to produce and store result data into the registers or the memories, the method comprising:

executing at least one instruction of the first program by the first processor to produce first result data,

storing said first result data at desired addresses of the memory or register,

executing at least one instruction of the second program by the second processor to produce second result data distinct from the first result data,

storing said second result data at addresses of the memory or register defined by a desired mapping applied on each memory or register address where the corresponding first result data are stored,

applying, by the data consistency check module, a function either over the first result data or the second result data to obtain a test result, wherein the applying a function applies one of a logical operation, a mathematical function, and a cryptographic function such that the obtained test result is a modified version of one of the first result data and the second result data,

determining by the data consistency check module the memory or register addresses of the result data and identify suitable result data to verify,

comparing, by the data consistency check module, the obtained test result either with the corresponding second result data or first result data,

continuing execution of instructions of each program by the first and second processor when the comparison between the test result and the corresponding result data is successful, and

stopping execution of instructions of each program by the first and second processor when the comparison shows an error.