Chip on film type semiconductor package

• US 9,070,680 B2
• Filed: 02/24/2012
• Issued: 06/30/2015
• Est. Priority Date: 04/28/2011
• Status: Active Grant

• Current Assignee: Magnachip Semiconductor Limited (Magnachip Semiconductor)
• Original Assignee: Magnachip Semiconductor Limited (Magnachip Semiconductor)
• Inventors: Kim, Do-young
• Primary Examiner(s): CLARK, JASMINE JHIHAN B
• Application Number:
  US13/404,085
• Publication Number:
  US 20120273928A1
• Time in Patent Office: 1,222 Days
• Field of Search: 257/276, 257/625, 257/673, 257/675, 257/706, 257/707, 257712-722, 257/796, 257/674, 257/668, 257/753, 257/783, 257/E23.012, 257/E23.019, 257/E23.034, 257/E23.051, 257/E23.16, 257/E21.514, 257/E23.101, 438/111, 438/112, 438/122, 438/123, 438/FOR.366, 438/FOR.367, 438/FOR.377, 438/FOR.380, 438/FOR.413
• US Class Current: 1/1
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/0345 Physical vapour deposition [PVD], e.g. evaporation, or sputtering
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05567 the external layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16238 the bump connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/81191 wherein the bump connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/831 the layer connector being supplied to the parts to be connected in the bonding apparatus
• CPC Class Codes: H01L 23/36 Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/373 Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 23/522 : including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/12041 : LED

Abstract

A chip on film (COF) type semiconductor package is provided. The chip on film (COF) type semiconductor package includes a film, a plurality of leads formed on a surface of the film, a chip adhered to ends of the leads, an underfill layer filled within a space between the chip and the leads, and a heat dissipation layer adhered to an other surface of the film, the heat dissipation layer including a graphite material layer, a protection layer formed on a surface of the graphite material layer to cover the graphite material layer, and an adhesion layer formed on an other surface of the graphite material layer to adhere the heat dissipation layer to the other surface of the film.

Claims

1. A chip on film (COF) type semiconductor package, comprising:

a film;

a plurality of leads formed on a surface of the film;

a chip adhered to ends of the leads;

an underfill layer filled within a space between the chip and the leads; and

a heat dissipation layer adhered to an other surface of the film, the heat dissipation layer comprising;

a graphite material layer comprising a graphite film that has a multi-layered structure in which a plurality of graphite thin films is laminated;

a protection layer formed on a surface of the graphite material layer to cover the graphite material layer; and

an adhesion layer formed on an other surface of the graphite material layer to adhere the heat dissipation layer to the other surface of the film.

2. The semiconductor package as claimed in claim 1, wherein the protection layer comprises one or more selected from the group consisting of polyethylene terephthalate, polybutylene terephthalate, polytrimethylene terephthalate, polycyclohexylene terephthalate, and polyethylene naphthalate.

3. The semiconductor package as claimed in claim 1, wherein a thickness of the protection layer is in a range from 10 μ

m to 40 μ

m.

4. The semiconductor package as claimed in claim 1, wherein a thickness of the graphite material layer is in a range from 20 μ

m to 60 μ

m.

5. The semiconductor package as claimed in claim 1, wherein the the graphite film is obtained from a polymer or a carbonized polymer.

6. The semiconductor package as claimed as in claim 5, wherein the polymer or the carbonized polymer is cross-linked.

7. The semiconductor package as claimed in claim 5, wherein a thickness of the graphite material layer is in a range from 20 μ

m to 60 μ

m.

8. The semiconductor package as claimed in claim 1, wherein the graphite film comprises 100 to 300 graphite thin films.

9. The semiconductor package as claimed in claim 8, wherein a thickness of the graphite material layer is in a range from 20 μ

m to 60 μ

m.

10. The semiconductor package as claimed in claim 1, wherein the protection layer has an insulation property.

11. The semiconductor package as claimed in claim 10, wherein the protection layer comprises one or more selected from the group consisting of polyethylene terephthalate, polybutylene terephthalate, polytrimethylene terephthalate, polycyclohexylene terephthalate, and polyethylene naphthalate.

12. The semiconductor package as claimed in claim 10, wherein a thickness of the protection layer is in a range from 10 μ

m to 40 μ

m.

13. The semiconductor package as claimed in claim 1, wherein a thickness of the adhesion layer is in a range from 10 μ

m to 40 μ

m.

14. The semiconductor package as claimed in claim 1, wherein a thickness of the heat dissipation layer is in a range from 60 μ

m to 140 μ

m.

15. The semiconductor package as claimed as in claim 1, wherein the chip comprises a driver integrated circuit (IC) chip.

16. The semiconductor package as claimed as in claim 1, wherein the film comprises polyimide.

17. The semiconductor package as claimed in claim 1, wherein the adhesive layer comprises conductive particles.

18. The semiconductor package as claimed in claim 1, wherein the protection layer covers only the graphite material layer.

19. A method of fabricating a graphite film of a graphite material layer of a heat dissipation layer of a chip on film (COF) type semiconductor package, the COF type semiconductor package including a film, a plurality of leads formed on a surface of the film, a chip adhered to ends of the leads, an underfill layer filled within a space between the chip and the leads, and the heat dissipation layer adhered to an other surface of the film, the heat dissipation layer including the graphite material layer, a protection layer formed on a surface of the graphite material layer to cover the graphite material layer, and an adhesion layer formed on an other surface of the graphite material layer to adhere the heat dissipation layer to the other surface of the film, the method comprising making a graphite material layer comprising a graphite film layer that has a multi-layered structure in which a plurality of graphite thin films is laminated.

20. The method as claimed in claim 19, wherein the graphite film is obtained from a polymer film or a carbonized polymer film comprising polyimide.

21. A chip on film (COF) type semiconductor package, comprising:

a film;

a chip adhered to the film;

an adhesion layer formed on the film;

a heat dissipation layer formed over the adhesion layer; and

a protection layer formed on a surface of the heat dissipation wherein the protection layer has a thickness of from 10 μ

m to 40 μ

m.

22. The semiconductor package as claimed in claim 21, wherein the adhesive layer comprises conductive particles.

23. The semiconductor package as claimed in claim 21, wherein the protection layer covers only the heat dissipation layer.

24. The semiconductor package as claimed in claim 21, wherein the heat dissipation layer comprises a graphite film obtained from a polymer or a carbonized polymer.