Low-power system clock calibration based on a high-accuracy reference clock

• US 9,079,040 B2
• Filed: 08/29/2014
• Issued: 07/14/2015
• Est. Priority Date: 10/29/2010
• Status: Active Grant

• Current Assignee: Medtronic Incorporated (Medtronic Plc)
• Original Assignee: Medtronic Incorporated (Medtronic Plc)
• Inventors: Gordon, Charles R, Liang, Weizheng, Reinke, James D, Bond, Matthew C, Roberts, Jonathan P
• Primary Examiner(s): Koharski, Christopher D
• Assistant Examiner(s): MAHMOOD, NADIA AHMAD
• Application Number:
  US14/473,066
• Publication Number:
  US 20140371818A1
• Time in Patent Office: 319 Days
• Field of Search: 607/16, 607/27, 607/60
• US Class Current: 1/1
• CPC Class Codes: A61N 1/025 Digital circuitry features of electrotherapy devices, e.g. memory, clocks, processors
• CPC Class Codes: A61N 1/372 Arrangements in connection with the implantation of stimulators
• CPC Class Codes: A61N 1/37264 Changing the program; Upgrading firmware
• CPC Class Codes: A61N 1/37276 characterised by means for reducing power consumption during telemetry
• CPC Class Codes: G06F 1/04 Generating or distributing clock signals or signals derived directly therefrom
• CPC Class Codes: G06F 1/12 Synchronisation of different clock signals provided by a plurality of clock generators

Abstract

Various techniques are described for periodically performing a calibration routine to calibrate a low-power system clock within an implantable medical device (IMD) based on a high accuracy reference clock also included in the IMD. The system clock is powered continuously, and the reference clock is only powered on during the calibration routine. The techniques include determining a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles, and adjusting a trim value of the system clock to compensate for the clock error. Calibrating the system clock with a delta-sigma loop, for example, reduces the clock error over time. This allows accurate adjustment of the system clock to compensate for errors due to trim resolution, circuit noise and temperature.

Claims

1. A method comprising:

operating an implantable medical device (IMD) in accordance with a system clock that comprises a low power oscillator clock included in the IMD; and

periodically performing a calibration routine to calibrate the system clock based on the reference clock, wherein the system clock is continuously powered and the reference clock is powered during the calibration routine, wherein the reference clock comprises a crystal oscillator.

4. The method of claim 1, further comprising:

monitoring for a telemetry downlink with a telemetry module included in the IMD in accordance with a telemetry polling clock included in the IMD; and

periodically performing the calibration routine to simultaneously calibrate the system clock and the telemetry polling clock based on the reference clock.

5. The method of claim 1, further comprising:

performing a telemetry session with a telemetry module included in the IMD in accordance with a telemetry linking clock included in the IMD once a telemetry downlink is present; and

continuously performing a calibration routine to calibrate the telemetry linking clock based on the reference clock during the telemetry session, wherein the reference clock is powered continuously during the telemetry session.

6. The method of claim 1, wherein periodically performing a calibration routine with a delta-sigma loop to calibrate the system clock comprises periodically performing the calibration routine according to a calibration period set equal to one of 3.75 minutes, 7 minutes, 15 minutes, 30 minutes and 60 minutes.

7. The method of claim 1, wherein the reference clock comprises a crystal oscillator.

2. A method comprising:

operating an implantable medical device (IMD) in accordance with a system clock that comprises a low power oscillator clock included in the IMD; and

periodically performing a calibration routine to calibrate the system clock based on the reference clock, wherein the system clock is continuously powered and the reference clock is powered during the calibration routine, wherein periodically performing a calibration routine to calibrate the system clock further comprises;

powering on the reference clock at a start of the calibration routine;

determining a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles of the system clock;

adjusting a trim value of the system clock to compensate for the clock error; and

disabling the reference clock at an end of the calibration routine, and wherein determining a clock error of the system clock further comprises;

setting a system clock counter and a reference clock counter equal to the fixed number of clock cycles;

decrementing the system clock counter by one for each clock cycle of the system clock, wherein the system clock counter stops when equal to zero; and

decrementing the reference clock counter by one for each clock cycle of the reference clock, wherein the reference clock counter stops at a reference count value when the system clock counter is equal to zero, wherein the reference count value is indicative of the clock error of the system clock.

3. The method of claim 2, wherein periodically performing a calibration routine to calibrate the system clock further comprises periodically performing a calibration routine with a delta-sigma loop, the method further comprising:

integrating the clock error over time to calculate a cumulative clock cycle error of the system clock; and

adjusting the trim value of the system clock based on a magnitude and sign of the cumulative clock error.

8. A computer-readable storage medium comprising instructions that, when executed, cause a programmable processor to:

operate an implantable medical device (IMD) in accordance with a system clock that comprises a low power oscillator clock included in the IMD; and

periodically perform a calibration routine to calibrate the system clock based on the reference clock, wherein the system clock is continuously powered and the reference clock is powered during the calibration routine, wherein the system clock and the reference clock operate at a same clock frequency value.

11. The computer-readable medium of claim 8, further comprising instructions that cause the programmable processor to:

monitor for a telemetry downlink with a telemetry module included in the IMD in accordance with a telemetry polling clock included in the IMD; and

periodically perform the calibration routine to simultaneously calibrate the system clock and the telemetry polling clock based on the reference clock.

12. The computer-readable medium of claim 8, further comprising instructions that cause the programmable processor to:

perform a telemetry session with a telemetry module included in the IMD in accordance with a telemetry linking clock included in the IMD once a telemetry downlink is present; and

continuously perform a calibration routine to calibrate the telemetry linking clock based on the reference clock during the telemetry session, wherein the reference clock is powered continuously during the telemetry session.

13. The computer-readable medium of claim 8, wherein instructions that cause the programmable processor to periodically perform a calibration routine with a delta-sigma loop to calibrate the system clock further comprise instruction that cause the programmable processor to periodically perform the calibration routine according to a calibration period set equal to one of 3.75 minutes, 7 minutes, 15 minutes, 30 minutes and 60 minutes.

14. The computer-readable medium of claim 8, wherein the reference clock comprises a crystal oscillator.

9. A computer-readable storage medium comprising instructions that, when executed, cause a programmable processor to:

operate an implantable medical device (IMD) in accordance with a system clock that comprises a low power oscillator clock included in the IMD;

periodically perform a calibration routine to calibrate the system clock based on the reference clock, wherein the system clock is continuously powered and the reference clock is powered during the calibration routine;

power on the reference clock at a start of the calibration routine;

determine a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles of the system clock;

adjust a trim value of the system clock to compensate for the clock error; and

disable the reference clock at an end of the calibration routine, wherein the instructions that cause the programmable processor to determine a clock error of the system clock further comprise instructions that cause the programmable processor to;

set a system clock counter and a reference clock counter equal to the fixed number of clock cycles;

decrement the system clock counter by one for each clock cycle of the system clock, wherein the system clock counter stops when equal to zero; and

decrement the reference clock counter by one for each clock cycle of the reference clock, wherein the reference clock counter stops at a reference count value when the system clock counter is equal to zero, wherein the reference count value is indicative of the clock error of the system clock.

10. The computer-readable storage medium of claim 9, wherein instructions that cause the programmable processor to periodically perform a calibration routine to calibrate the system clock further comprise instructions that cause the programmable processor to periodically perform a calibration routine with a delta-sigma loop, further comprising instructions that cause the programmable processor to:

integrate the clock error over time to calculate a cumulative clock error of the system clock; and

adjust a trim value of the system clock based on a magnitude and sign of the cumulative clock error.