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Liquid crystal display device

  • US 9,082,367 B2
  • Filed: 03/27/2013
  • Issued: 07/14/2015
  • Est. Priority Date: 05/31/2012
  • Status: Active Grant
First Claim
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1. A liquid crystal display device comprising a liquid crystal display panel that has a first substrate, a second substrate, and a liquid crystal sandwiched between the first substrate and the second substrate, in which there is provided a display section formed of a plurality of pixels arranged in matrix,wherein the second substrate has detection electrodes of a touch panel,wherein each pixel has a pixel electrode and a counter electrode,wherein the display section is divided into a plurality of blocks each of which is formed of the pixels disposed on a plurality of display lines adjacent to one another,wherein the counter electrode is an electrode common to the pixels in each block,wherein the counter electrode of each block also functions as a scanning electrode of the touch panel,wherein the liquid crystal display device has a driving circuit which supplies a counter voltage and a touch panel scanning voltage to the counter electrodes of the respective blocks,wherein the driving circuit has a gradation voltage generation circuit which generates a plurality of gradation voltages,wherein the gradation voltage generation circuit has a plurality of amplifier circuits which output the plurality of gradation voltages,wherein each amplifier circuit has a current adjustment circuit capable of adjusting current flowing in the amplifier circuit itself, andwherein the driving circuitcauses the current adjustment circuit of a middle amplifier circuit other than a top amplifier circuit, which outputs a highest gradation voltage, and a bottom amplifier circuit, which outputs a lowest gradation voltage, among the plurality of amplifier circuits, to stop an operation of the corresponding middle amplifier circuit, in a first low power consumption mode for achieving lower power consumption than a normal operation,causes the current adjustment circuit of the middle amplifier circuit to stop the operation of the corresponding middle amplifier circuit and causes the current adjustment circuits of the top amplifier circuit and the bottom amplifier circuit to reduce current, which flows in the top amplifier circuit and the bottom amplifier circuit, such that the current is lower than current, which flows in the amplifier circuit at the time of the normal operation, in a second low power consumption mode for achieving lower power consumption than the first low power consumption mode, andcauses the current adjustment circuits of the respective amplifier circuits, which output the plurality of gradation voltages, to stop operations of the respective amplifier circuits and supply a GND voltage as the lowest gradation voltage, in a third low power consumption mode for achieving lower power consumption than the second low power consumption mode.

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