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Semiconductor memory device storing refresh period information and operating method thereof

  • US 9,082,504 B2
  • Filed: 07/05/2013
  • Issued: 07/14/2015
  • Est. Priority Date: 07/12/2012
  • Status: Active Grant
First Claim
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1. A semiconductor memory device comprising:

  • a cell array comprising one or more cell regions each having a plurality of memory cells; and

    a refresh information storing unit configured to store first information including a first refresh period, and second information including a second refresh period in correspondence to each of the cell regions,wherein memory cells included in each of the cell regions are refreshed at the first refresh period according to the first information in a first refresh time band and are refreshed at the second refresh period according to the second information in a second refresh time band.

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