Method for forming self-aligned trench contacts of semiconductor components and a semiconductor component
First Claim
1. A method for producing a semiconductor component, comprising:
- providing a semiconductor arrangement comprising;
a semiconductor body comprising a first semiconductor material extending to a first surface and at least one trench extending from the first surface, the at least one trench comprising a conductive region insulated from the semiconductor body and arranged below the first surface;
forming a second insulation layer on the first surface comprising a recess that overlaps in a projection onto the first surface with the conductive region;
forming a mask region in the recess; and
etching the second insulation layer selectively to the mask region and the semiconductor body to expose the semiconductor body at the first surface;
depositing a third insulation layer on the first surface; and
etching the third insulation layer so that a semiconductor mesa of the semiconductor body arranged next to the at least one trench is exposed at the first surface.
1 Assignment
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Accused Products
Abstract
A semiconductor body component has a first surface and is comprised of a first semiconductor material extending to the first surface. At least one trench extends from the first surface into the semiconductor body and includes a gate electrode insulated from the semiconductor body and arranged below the first surface. A second insulation layer is formed on the first surface with a recess that overlaps in projection onto the first surface with the conductive region. A mask region is formed in the recess, and the second insulation layer is etched selectively to the mask region and the semiconductor body to expose the semiconductor body at the first surface. A third insulation layer is deposited on the first surface, and the third insulation layer is etched so that a semiconductor mesa of the semiconductor body arranged next to the at least one trench is exposed at the first surface.
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Citations
25 Claims
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1. A method for producing a semiconductor component, comprising:
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providing a semiconductor arrangement comprising;
a semiconductor body comprising a first semiconductor material extending to a first surface and at least one trench extending from the first surface, the at least one trench comprising a conductive region insulated from the semiconductor body and arranged below the first surface;forming a second insulation layer on the first surface comprising a recess that overlaps in a projection onto the first surface with the conductive region; forming a mask region in the recess; and etching the second insulation layer selectively to the mask region and the semiconductor body to expose the semiconductor body at the first surface; depositing a third insulation layer on the first surface; and etching the third insulation layer so that a semiconductor mesa of the semiconductor body arranged next to the at least one trench is exposed at the first surface. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method for producing a semiconductor component, comprising:
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providing a semiconductor arrangement comprising;
a semiconductor body comprising a first semiconductor material extending to a first surface and at least one trench extending from the first surface, the at least one trench comprising a gate electrode insulated from the semiconductor body and arranged below the first surface;depositing an insulation layer on the first surface and the gate electrode so that the insulation layer comprises a recess that is, in a projection onto the first surface, completely arranged within the at least one trench; and filling the recess with a non-crystalline form of the first semiconductor material to form a mask region. - View Dependent Claims (17, 18)
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19. A method for producing a semiconductor component, comprising:
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providing a semiconductor arrangement comprising;
a semiconductor body comprising a first semiconductor material extending to a first surface and at least one trench extending from the first surface, the at least one trench comprising a gate electrode insulated from the semiconductor body and arranged below the first surface;depositing an insulation layer on the first surface and the gate electrode so that the insulation layer comprises a recess which is, in a projection onto the first surface, completely arranged within the at least one trench; and forming a mask region comprising depositing a dielectric material on the insulation layer and plasma etching the dielectric material using the insulation layer as an etch-stop. - View Dependent Claims (20, 21)
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22. A field effect semiconductor component, comprising:
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a semiconductor body having a first surface defining a vertical direction; at least one trench extending from the first surface into the semiconductor body and comprising a gate electrode arranged below the first surface and being insulated from the semiconductor body; a first metallization arranged on the first surface and in electric contact with the semiconductor body; and an insulation structure arranged between the gate electrode and the first metallization, the insulation structure comprising a silicon oxide layer adjoining an upper surface of the gate electrode, extending above the first surface and comprising a recess completely arranged within the gate electrode when seen from above, the insulation structure further comprising a silicon nitride region arranged in the recess and between the silicon oxide layer and the first metallization. wherein the silicon oxide layer comprises at least one of; a first silicon oxide region arranged below the silicon nitride region and comprised of one of TEOS and a HDP-oxide; and a second silicon oxide region arranged between the first silicon oxide region and the first metallization and comprised of at least one of TEOS, USG and a doped oxide. - View Dependent Claims (23, 24, 25)
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Specification