System and method for providing an active current assist with analog bypass for a switcher circuit

• US 9,083,239 B2
• Filed: 01/05/2012
• Issued: 07/14/2015
• Est. Priority Date: 06/18/2008
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Huard, Jeffry Mark
• Primary Examiner(s): Han, Jessica
• Application Number:
  US13/344,428
• Publication Number:
  US 20120105032A1
• Time in Patent Office: 1,286 Days
• Field of Search: 323/266, 323/268, 323271-284
• US Class Current: 1/1
• CPC Class Codes: H02M 3/1566 with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

A system and method are disclosed for providing an active current assist with analog bypass for a switcher circuit. An active current assist circuit is coupled to a buck regulator circuit, which includes a switcher circuit, an inductor circuit and a capacitor circuit. The active current assist circuit includes an active current analog bypass control circuit and a current source. The active current analog bypass control circuit receives and uses current limit information, voltage error information, and drop out information to determine a value of assist current that is appropriate for a current operational state of the buck regulator circuit. The active current analog bypass control circuit causes the current source to provide the appropriate value of assist current to the buck regulator circuit.

Claims

1. A buck regulator circuit for providing buck regulation to supply a regulated load current to a load, the buck regulator circuit operable with a buck inductor coupled to the buck regulator at a switch node and to the load at an output node, and with an output capacitor coupled to the output node in parallel with the load, the buck regulator circuit comprising:

a switcher circuit operable to provide buck regulation and supply an inductor current through the buck inductor to the load, including charging and discharging the output capacitor; and

an analog bypass (ACB) circuit including;

an ACB current source coupled to the output node and in parallel with the buck inductor, and configured to supply, in response to an ACB control signal, an ACB current to the output node; and

an ACB control circuit configured to provide the ACB control signal;

wherein the ACB control circuit is configured to receive inductor current information from the switcher circuit, and to provide an inductor current signal representative of the inductor current relative to a predetermined inductor current value and whether the inductor current is positive or negative; and

wherein the ACB control circuit is operable to provide the ACB control signal based on the inductor current signal such that the ACB circuit supplies ACB current to assist the inductor current supplied by the switcher circuit in charging and discharging the output capacitor.

2. The buck regulator as set forth in claim 1:

wherein the inductor current information comprises inductor current and predetermined reference currents; and

wherein the ACB control circuit comprises current comparator circuitry configured to compare inductor current and the reference currents, and to provide the inductor current signal.

3. The buck regulator circuit as set forth in claim 1, wherein the ACB current source comprises a positive ACB current source to source the ACB current and a negative ACB current source to sink the ACB current.

4. The buck regulator circuit as set forth in claim 1:

wherein the ACB current source comprises series coupled pull-up and pull-down digital to analog converters (DACs) responsive to polarity select signals to selectively enable either the pull-up DAC to source the ACB current to the output node, or the pull-down DAC to sink the ACB current from the output node; and

wherein the ACB control circuit includes;

a combination logic and state machine configured to provide, in response to the inductor current signal, (i) a variable multi-bit control value, and (ii) the polarity select signals; and

a DAC count circuit configured to provide, in response to the variable multi-bit count value, the ACB control signal to control the pull-up and pull-down DACs.

5. The buck regulator circuit as set forth in claim 1, wherein the predetermined inductor current value is representative of inductor saturation.

6. The buck regulator circuit as set forth in claim 1:

wherein the switcher circuit and the buck inductor are characterized by a switcher/inductor drop out resistance, and the ACB current source is characterized by an ACB resistance, such that a regulator drop out resistance at the output node corresponds to the switcher/inductor drop out resistance in parallel with the ACB resistance, which is less than the switcher/inductor drop out resistance; and

wherein the ACB control circuit includes a drop out detector circuit configured to receive drop out information from the switcher circuit, and to provide a drop out signal representative of buck regulation operation of the switcher circuit relative to a predetermined drop out condition in which the switcher substantially ceases regulation.

7. The buck regulator circuit of claim 6, wherein the drop out detector comprises at least one of:

(i) a pulse skip detector circuit configured to receive pulse skip information from the switcher circuit corresponding to a predetermined pulse skip condition; and

(ii) a voltage error comparator circuit configured to receive output voltage information from the switcher circuit corresponding to a predetermined buck regulation condition.

8. The buck regulator circuit as set forth in claim 1, wherein the ACB control circuit is operable to provide the ACB control signal to control both the magnitude and the rate of change of the ACB current supplied to the load.

9. The buck regulator circuit as set forth in claim 1, wherein the ACB control circuit is operable to provide the ACB control signal with a dead band in which the ACB current does not change in response to inductor current information.

10. A buck regulator circuit for providing buck regulation to supply a regulated load current to a load, the buck regulator circuit operable with a buck inductor coupled to the buck regulator at a switch node and to the load at an output node, and with an output capacitor coupled to the output node in parallel with the load, the buck regulator circuit, comprising:

a switcher circuit operable to provide buck regulation and supply an inductor current through the buck inductor to the load, including charging and discharging the output capacitor; and

an analog bypass (ACB) circuit including;

an ACB current source coupled to the output node and in parallel with the buck inductor, and configured to supply, in response to an ACB control signal, an ACB current to the output node; and

wherein the ACB current source comprises series coupled pull-up and pull-down digital to analog converters (DACs) responsive to polarity select signals to selectively enable either the pull-up DAC to source the ACB current to the output node, or the pull-down DAC to sink the ACB current from the output node; and

an ACB control circuit configured to provide the ACB control signal;

wherein the ACB control circuit is configured to receive inductor current information from the switcher circuit, and to provide an inductor current signal representative of the inductor current relative to a predetermined inductor current value and whether the inductor current is positive or negative,

wherein the ACB control circuit includes;

a combination logic and state machine configured to provide, in response to the inductor current signal, (i) a variable multi-bit control value, and (ii) the polarity select signals; and

a DAC count circuit configured to provide, in response to the variable multi-bit count value, the ACB control signal to control the pull-up and pull-down DACs; and

wherein the ACB control circuit is operable to provide the ACB control signal based on the inductor current signal such that the ACB circuit supplies ACB current to assist the inductor current supplied by the switcher circuit in charging and discharging the output capacitor.

11. The buck regulator as set forth in claim 10:

wherein the inductor current information comprises inductor current and predetermined reference currents; and

wherein the ACB control circuit comprises current comparator circuitry configured to compare inductor current and the reference currents, and to provide the inductor current signal.

12. The buck regulator circuit as set forth in claim 10, wherein the predetermined inductor current value is representative of inductor saturation.

13. The buck regulator circuit as set forth in claim 10:

wherein the switcher circuit and the buck inductor are characterized by a switcher/inductor drop out resistance, and the ACB current source is characterized by an ACB resistance, such that a regulator drop out resistance at the output node corresponds to the switcher/inductor drop out resistance in parallel with the ACB resistance, which is less than the switcher/inductor drop out resistance; and

wherein the ACB control circuit includes a drop out detector circuit configured to receive drop out information from the switcher circuit, and to provide a drop out signal representative of buck regulation operation of the switcher circuit relative to a predetermined drop out condition in which the switcher substantially ceases regulation.

14. The buck regulator circuit of claim 13, wherein the drop out detector comprises at least one of:

(i) a pulse skip detector circuit configured to receive pulse skip information from the switcher circuit corresponding to a predetermined pulse skip condition; and

(ii) a voltage error comparator circuit configured to receive output voltage information from the switcher circuit corresponding to a predetermined buck regulation condition.

15. The buck regulator circuit as set forth in claim 10, wherein the ACB control circuit is operable to provide the ACB control signal to control both the magnitude and the rate of change of the ACB current supplied to the load.

16. The buck regulator circuit as set forth in claim 10, wherein the ACB control circuit is operable to provide the ACB control signal with a dead band in which the ACB current does not change in response to the inductor current information.

17. A method of buck regulation to supply a regulated load current to a load through a buck inductor that is coupled to a buck regulator at a switch node and to the load at an output node, the method of buck regulation, and with an output capacitor coupled to the output node in parallel with the load, the buck regulator circuit, comprising:

operating the buck regulator to supply an inductor current through the buck inductor to the load; and

controlling an ACB current source coupled to the output node in parallel with the buck inductor to supply to the output node an ACB current;

providing an ACB control signal to control the ACB current source by;

providing, in response to inductor current information, an inductor current signal representative of the inductor current relative to a predetermined inductor current value and whether the inductor current is positive or negative; and

providing the ACB control signal based on the inductor current signal such that the ACB current assists the inductor current supplied by the switcher circuit in charging and discharging the output capacitor.

18. The method as set forth in claim 17:

wherein the inductor current information comprises inductor current and predetermined reference currents; and

wherein providing an inductor current signal is performed by comparing inductor current and the reference currents.

19. The method as set forth in claim 17, wherein the ACB current source comprises a positive ACB current source to source the ACB current and a negative ACB current source to sink the ACB current.

20. The method as set forth in claim 17, wherein the predetermined inductor current value is representative of inductor saturation.

21. The method as set forth in claim 17, wherein the ACB current source is controlled to control both the magnitude and the rate of change of the ACB current supplied to the load.

22. The method as set forth in claim 17, wherein the ACB control circuit is controlled to provide a dead band in which the ACB current does not change in response to inductor current information.