Capacitive element, capacitor array, and A/D converter
First Claim
Patent Images
1. A capacitive element comprising:
- a first terminal;
a second terminal;
first electrodes and second electrodes that are alternately arranged in a concentric form in a plurality of wiring layers provided on or above a substrate, each of the first electrodes and the second electrodes being formed with closed loop form, whereinthe first electrodes and the second electrodes are formed in corresponding positions in the plurality of wiring layers,the first electrodes and the second electrodes are both connected to one of the first terminal and the second terminal in a first wiring layer of the plurality of wiring layers, the first wiring layer being an undermost wiring layer at a substrate side among the plurality of wiring layers, andthe first electrodes and the second electrodes are connected to the first terminal and the second terminal, respectively, in a second wiring layer of the plurality of wiring layers, the second wiring layer being above the first wiring layer, each of the first electrodes and a corresponding one of the second electrodes that is adjacent to the each of the first electrodes being capacitively coupled in the second wiring layer to form a capacitor.
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Accused Products
Abstract
A capacitive element includes first electrodes and second electrodes that are alternately arranged in a concentric form. Each of the first electrodes and the second electrodes is formed with closed loop form, in at least one wiring layer provided on or above a substrate.
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Citations
19 Claims
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1. A capacitive element comprising:
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a first terminal; a second terminal; first electrodes and second electrodes that are alternately arranged in a concentric form in a plurality of wiring layers provided on or above a substrate, each of the first electrodes and the second electrodes being formed with closed loop form, wherein the first electrodes and the second electrodes are formed in corresponding positions in the plurality of wiring layers, the first electrodes and the second electrodes are both connected to one of the first terminal and the second terminal in a first wiring layer of the plurality of wiring layers, the first wiring layer being an undermost wiring layer at a substrate side among the plurality of wiring layers, and the first electrodes and the second electrodes are connected to the first terminal and the second terminal, respectively, in a second wiring layer of the plurality of wiring layers, the second wiring layer being above the first wiring layer, each of the first electrodes and a corresponding one of the second electrodes that is adjacent to the each of the first electrodes being capacitively coupled in the second wiring layer to form a capacitor. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A capacitor array including a plurality of unit capacitors arranged in an array form, and defining the number of the unit capacitors used as each of a plurality of capacitive elements in accordance with a relative ratio of capacitance values of the plurality of capacitive elements, the capacitor array comprising:
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a first wiring layer which connects the plurality of capacitive elements to a common electrode; and a second wiring layer which connects the unit capacitors used for each of the plurality of capacitive elements, wherein each of the plurality of unit capacitors includes; a first terminal; a second terminal; first electrodes and second electrodes that are alternately arranged in a concentric form in a plurality of wiring layers provided on or above a substrate, each of the first electrodes and the second electrodes being formed with closed loop form, wherein the first electrodes and the second electrodes are formed in corresponding positions in the plurality of wiring layers, the first electrodes and the second electrodes are both connected to one of the first terminal and the second terminal in a third wiring layer of the plurality of wiring layers, the third wiring layer being an undermost wiring layer at a substrate side among the plurality of wiring layers, and the first electrodes and the second electrodes are connected to the first terminal and the second terminal, respectively, in a fourth wiring layer of the plurality of wiring layers, the fourth wiring layer being above the third wiring layer, each of the first electrodes and a corresponding one of the second electrodes that is adjacent to the each of the first electrodes being capacitively coupled in the fourth wiring layer to form a capacitor. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An A/D converter comprising:
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a capacitor array including a plurality of unit capacitors arranged in an array form, and defining the number of the unit capacitors used as each of a plurality of capacitive elements in accordance with a relative ratio of capacitance values of the plurality of capacitive elements; a plurality of switches arranged at a periphery of the capacitor array and provided corresponding to the plurality of capacitive elements; and a comparator arranged at the periphery of the capacitor array and configured to compare input voltage with voltage corresponding to the capacitive elements selected by the plurality of switches, wherein analog-to-digital conversion of the input voltage is performed, and the capacitor array includes; a first wiring layer which connects the plurality of capacitive elements to a common electrode; and a second wiring layer which connects the unit capacitors used for each of the plurality of capacitive elements, wherein each of the plurality of unit capacitors includes; a first terminal; a second terminal; first electrodes and second electrodes that are alternately arranged in a concentric form in a plurality of wiring layers provided on or above a substrate, each of the first electrodes and the second electrodes being formed with closed loop form, wherein the first electrodes and the second electrodes are formed in corresponding positions in the plurality of wiring layers, the first electrodes and the second electrodes are both connected to one of the first terminal and the second terminal in a third wiring layer of the plurality of wiring layers, the third wiring layer being an undermost wiring layer at a substrate side among the plurality of wiring layers, and the first electrodes and the second electrodes are connected to the first terminal and the second terminal, respectively, in a fourth wiring layer of the plurality of wiring layers, the fourth wiring layer being above the third wiring layer, each of the first electrodes and a corresponding one of the second electrodes that is adjacent to the each of the first electrodes being capacitively coupled in the fourth wiring layer to form a capacitor. - View Dependent Claims (16, 17, 18)
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19. An integrated circuit, comprising:
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an A/D converter including; a capacitor array including a plurality of unit capacitors arranged in an array form, and defining the number of the unit capacitors used as each of a plurality of capacitive elements in accordance with a relative ratio of capacitance values of the plurality of capacitive elements; a plurality of switches arranged at a periphery of the capacitor array and provided corresponding to the plurality of capacitive elements; and a comparator arranged at the periphery of the capacitor array and configured to compare input voltage with voltage corresponding to the capacitive elements selected by the plurality of switches, wherein analog-to-digital conversion of the input voltage is performed, and the capacitor array includes; a first wiring layer which connects the plurality of capacitive elements to a common electrode; and a second wiring layer which connects the unit capacitors used for each of the plurality of capacitive elements, wherein each of the plurality of unit capacitors includes; a first terminal; a second terminal; first electrodes and second electrodes that are alternately arranged in a concentric form in a plurality of wiring layers provided on or above a substrate, each of the first electrodes and the second electrodes being formed with closed loop form, wherein the first electrodes and the second electrodes are formed in corresponding positions in the plurality of wiring layers, the first electrodes and the second electrodes are both connected to one of the first terminal and the second terminal in a third wiring layer of the plurality of wiring layers, the third wiring layer being an undermost wiring layer at a substrate side among the plurality of wiring layers, and the first electrodes and the second electrodes are connected to the first terminal and the second terminal, respectively, in a fourth wiring layer of the plurality of wiring layers, the fourth wiring layer being above the third wiring layer, each of the first electrodes and a corresponding one of the second electrodes that is adjacent to the each of the first electrodes being capacitively coupled in the fourth wiring layer to form a capacitor.
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Specification