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Method for reducing processing latency in a multi-thread packet processor with at least one re-order queue

  • US 9,083,563 B2
  • Filed: 06/29/2012
  • Issued: 07/14/2015
  • Est. Priority Date: 06/29/2012
  • Status: Active Grant
First Claim
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1. A method of reducing processing latency in a multi-thread packet processor with at least one first-in-first-out re-order queue, the method comprising the steps of:

  • implementing stage 1 packet processing;

    marking a packet as ready to be transmitted from the first-in-first-out re-order queue in a scoreboard table;

    reading an identifier at the head of the re-order queue,using the identifier to locate a flag in the scoreboard table,reading the flag in the scoreboard table associated with the identifier, andtransmitting the packet if the flag in the scoreboard table indicates that stage 1 processing has been completed for the packet; and

    implementing stage 2 packet processing after the step of marking the packet for transmission from the re-order queue.

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