Program analysis support device

• US 9,087,151 B2
• Filed: 08/11/2009
• Issued: 07/21/2015
• Est. Priority Date: 02/18/2009
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: Nakai, Satoru, Furuta, Hirohisa, Ishihara, Akira, Sato, Kimiaki, Tsuboi, Takashi, Kaneko, Akira
• Primary Examiner(s): Fennema, Robert
• Assistant Examiner(s): Sivanesan, Sivalingam
• Application Number:
  US13/144,037
• Publication Number:
  US 20110270424A1
• Time in Patent Office: 2,170 Days
• Field of Search: 700/87
• US Class Current: 1/1
• CPC Class Codes: G06F 11/3604 Software analysis for verifying properties of programs byte-code verification G06F9/44589
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A program analysis support device that can freely combine program analysis conditions and can realize desired program analysis. An analysis condition setting part inputs a program analysis condition in a form of a conditional equation (analysis command, an analysis subject, and analysis condition) having an inherent equation number. A POU list extraction processing executing part executes an analysis command that reads a program to generate a collection of POUs serving as analysis subjects constituting the program, and a variable use list extraction processing executing part executes an analysis command that extracts a cross-reference of a variable to extract a cross-reference of a variable to the POU collection serving as the analysis subject. Both the parts further extract a cross-reference of a variable to another POU collection. An AND processing part further performs processing of a logical product of the cross-references of both the variables and outputs a result thereof to an analysis result display part.

Claims

1. A program analysis support device having a program that represents a circuit diagram of relay logic and includes a plurality of hierarchical program modules, which are units of the relay logic, the device comprising:

a microprocessor configured to

input and hold a program analysis condition indicating a proposed change to the relay logic, the program analysis condition including at least one of the program modules and at least one device of the at least one of the program modules to be changed, as designated by a user,

execute analysis of the at least one program module to identify dependent devices whose operation is dependent upon the at least one device to be changed and to identify program modules containing the dependent devices,

output and store an analysis result including dependence directed graphs indicating hierarchical dependencies of the identified dependent devices,

output and store a collection of the identified program modules containing the dependent devices, and

display the analysis result wherein

the executing and the outputting and storing a collection are performed iteratively to identify other dependent devices whose operation is dependent upon the dependent devices identified in previous iterations of the executing in the program modules of the collection output in previous iterations of the outputting and storing,

thereby to improve efficiency of identifying devices and program modules affected by a change in the circuit diagram.

2. The program analysis support device according to claim 1, wherein the collection of the program modules output by the outputting and storing the collection of the program modules is a collection of all program modules included in the program.

3. The program analysis support device according to claim 1, wherein the microprocessor is further configured to output and store a cross-reference of devices present in the dependence directed graphs of the devices, and

wherein

when a collection of program modules exists in the dependence directed graphs of the devices, the microprocessor extracts a cross-reference of devices present in the dependence directed graphs of the devices and then extracts a collection of program modules present in the cross-reference of the devices.

4. A program analysis support device having a program that represents a circuit diagram of relay logic and includes a plurality of hierarchical program modules, which are units of the relay logic, the device comprising:

a microprocessor configured to

input and hold a program analysis condition indicating a proposed change to the relay logic, the program analysis condition including at least one of the program modules and at least one device of the at least one of the program modules to be changed, as designated by a user,

execute analysis of the at least one program module to identify dependent devices whose operation is dependent upon the at least one device to be changed and to identify program modules containing the dependent devices based on the program analysis condition,

extract and store an analysis result including a hierarchical relation of the identified program modules containing the identified dependent devices as dependence directed graphs indicating hierarchical dependencies of the program modules containing the dependent devices,

output and store a collection of the identified program modules containing the dependent devices, and

display the analysis result,

wherein

the executing and the outputting and storing a collection are performed iteratively to identify other program modules containing the dependent devices that are hierarchically below the program modules in the collection output in previous iterations of the outputting,

thereby to improve efficiency of identifying devices and program modules affected by a change in the circuit diagram.

5. The program analysis support device according to claim 4, wherein the microprocessor is further configured to extract a cross-reference of devices present in a program module being present in the dependence directed graphs related to the calling of the outputted program modules containing the dependent devices, and

wherein the extraction further includes extracting a collection of the program modules present in the dependence directed graphs related to the calling of the program modules then extracting a cross-reference of devices described in the collection of the program modules.

6. The program analysis support device according to claim 4, wherein the microprocessor is further configured to

output dependence directed graphs of devices described in the program modules by using a collection of program modules present in the dependence directed graphs related to the calling of the plurality of program modules, and

wherein the extraction includes extracting the collection of the program modules present in the dependence directed graphs related to the calling of the plurality of program modules and then extracting the dependence directed graphs of the devices by using the collection of the program modules.

7. A program analysis support device having a program that represents a circuit diagram of relay logic and includes a plurality of hierarchical program modules, which are units of the relay logic, the device comprising:

a microprocessor configured to

input and hold a program analysis condition indicating a proposed change to the relay logic, the program analysis condition including at least one of the program modules and at least one device of the at least one of the program modules to be changed, as designated by a user,

execute an analysis of the at least one program module to identify dependent devices whose operation is dependent upon the at least one device to be changed and to identify program modules containing the dependent devices,

display an analysis result of the analysis processing,

extract and store a cross-reference of the identified dependent devices included in the identified program modules,

output and store dependence directed graphs of the identified dependent devices described in the identified program modules,

output and store a collection of the identified program modules containing the identified dependent devices,

extract and store a hierarchical relation of the identified program modules containing the identified dependent devices as dependence directed graphs, and

process at least one of an AND, OR, and NOT logical operations using as arguments at least two of the stored cross-reference of the identified dependent devices, dependence directed graphs of the identified dependent devices, collection of the identified program modules and hierarchical relation of the identified program modules,

thereby to improve efficiency of identifying devices and program modules affected by a change in the circuit diagram.

8. The program analysis support device according to claim 7, wherein

it is assumed that one of analysis results designated as arguments of the logical operation is a collection of program modules, and the other of the analysis results is different from the collection of the program modules,

when the different analysis result is a cross-reference of devices, the outputting and storing the collection of the program modules outputs a collection of program modules present in the cross-reference of the devices,

when the different analysis result is a dependence directed graph of a device, the outputting and storing the collection of the program modules extracts a collection of program modules present in the dependence directed graph of the device,

when the different analysis result is a directed graph of a hierarchical relation of a program module, the outputting and storing the collection of the program modules outputs a collection of program modules present in the directed graph of the hierarchical relation of the program module,

in this manner, both the analysis results are set as the collection of the program modules, and

assuming that one of the analysis results is the cross-reference of the device, and the other of the analysis results is different from the cross-reference of the devices,

when the different analysis result is a dependence directed graph of a device, a signal is extracted that provides a cross-reference of devices being present in the dependence directed graph of the device,

when the different analysis result is a directed graph of a hierarchical relation of a program module, a signal is extracted that gives a cross-reference of devices present in a program module present in the directed graph of the hierarchical relation of the program module,

in this manner, both the analysis results are set as a cross-reference of devices,

in this state, processing of the logical operation is performed.

9. The program analysis support device according to claim 8, wherein

the microprocessor inputs the program analysis condition as a form of a conditional equation having a unique equation number,

the conditional equation includes

at least one of a conditional equation that extracts a signal that provides a cross-reference of the devices,

a conditional equation that outputs a signal that provides dependence directed graphs of the devices,

a conditional equation that extracts a signal that provides a hierarchical relation of the plurality of program modules as a dependence directed graph, and

a conditional equation that processes a logical operation of the analysis results.

10. The program analysis support device according to claim 9, wherein the microprocessor causes a display device to display

a cross-reference of the devices, when a processing result, such as an analysis result or a logical operation result of the conditional equation, is the cross-reference of the devices,

dependence directed graphs of the devices, when the analysis result or the logical operation result is the dependence directed graphs of the devices,

a collection of the program modules, when the analysis result or the logical operation result is the collection of the plurality of program modules,

a directed graph of the hierarchical relation of the plurality of program modules, when the analysis result or the logical operation result is the directed graph of a hierarchical relation of the plurality of program modules, and

the analysis results in units of analysis results of the conditional equations.

11. The program analysis support device according to claim 8, wherein

the microprocessor converts a form of the input program analysis condition into a form of a conditional equation having a unique equation number to execute input processing, and wherein

the conditional equation includes

at least one of a conditional equation that extracts a signal that provides a cross-reference of the devices,

a conditional equation that outputs a signal that provides dependence directed graphs of the devices,

a conditional equation that outputs a signal that provides a collection of the plurality of program modules,

a conditional equation that extracts a signal that provides a hierarchical relation of the plurality of program modules as a dependence directed graph, and

a conditional equation that processes a logical operation of the analysis results.

12. The program analysis support device according to claim 11, wherein the microprocessor causes a display device to display

a cross-reference of the devices, when a processing result, such as an analysis result or a logical operation result of the converted conditional equation, is the cross-reference of the devices,

dependence directed graphs of the devices, when the analysis result or the logical operation result is the dependence directed graphs of the devices,

a collection of the program modules, when the analysis result or the logical operation result is the collection of the plurality of program modules,

a directed graph of the hierarchical relation of the plurality of program modules, when the analysis result or the logical operation result is the directed graph of a hierarchical relation of the plurality of program modules, and

the analysis results in units of analysis results of the converted conditional equations.

13. The program analysis support device according to claim 7, wherein

the microprocessor inputs the program analysis condition as a form of a conditional equation having a unique equation number,

the conditional equation includes

at least one of a conditional equation that extracts a signal that provides a cross-reference of the devices,

a conditional equation that outputs a signal that provides dependence directed graphs of the devices,

a conditional equation that extracts a signal that provides a hierarchical relation of the plurality of program modules as a dependence directed graph, and

a conditional equation that processes a logical operation of the analysis results.

14. The program analysis support device according to claim 13, wherein the microprocessor causes a display device to display

a cross-reference of the devices, when a processing result, such as an analysis result or a logical operation result of the conditional equation, is the cross-reference of the devices,

dependence directed graphs of the devices, when the analysis result or the logical operation result is the dependence directed graphs of the devices,

a collection of the program modules, when the analysis result or the logical operation result is the collection of the plurality of program modules,

a directed graph of the hierarchical relation of the plurality of program modules, when the analysis result or the logical operation result is the directed graph of a hierarchical relation of the plurality of program modules, and

the analysis results in units of analysis results of the conditional equations.

15. The program analysis support device according to claim 7, wherein

the microprocessor converts a form of the input program analysis condition into a form of a conditional equation having a unique equation number to execute input processing, and wherein

the conditional equation includes

at least one of a conditional equation that extracts a signal that provides a cross-reference of the devices,

a conditional equation that outputs a signal that provides dependence directed graphs of the devices,

a conditional equation that outputs a signal that provides a collection of the plurality of program modules,

a conditional equation that extracts a signal that provides a hierarchical relation of the plurality of program modules as a dependence directed graph, and

a conditional equation that processes a logical operation of the analysis results.

16. The program analysis support device according to claim 15, wherein the microprocessor causes a display device to display

a cross-reference of the devices, when a processing result, such as an analysis result or a logical operation result of the converted conditional equation, is the cross-reference of the devices,

dependence directed graphs of the devices, when the analysis result or the logical operation result is the dependence directed graphs of the devices,

a collection of the program modules, when the analysis result or the logical operation result is the collection of the plurality of program modules,

a directed graph of the hierarchical relation of the plurality of program modules, when the analysis result or the logical operation result is the directed graph of a hierarchical relation of the plurality of program modules, and

the analysis results in units of analysis results of the converted conditional equations.