Systems and methods of battery cell anomaly detection
First Claim
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1. A system comprising:
- a plurality of voltage to current (V-to-I) converters each being couplable to one of a respective plurality of cells;
a cell detector circuit coupled to each of the plurality of V-to-I converters to receive a current generated by its respective V-to-I converter, wherein the cell detector circuit compares each of the respective plurality of cells with other cells in the plurality of cells by determining a maximum current input to the converters and which cell provides that maximum current to determine if any of the plurality of V-to-I converters provides an anomalous input current and determines which of the plurality of V-to-I converters provides the anomalous input current whereby relative performance between the cells is determined, wherein the cell detector circuit further comprises a plurality of multi-input current detectors, wherein each of the plurality of multi-input current detectors is coupled to each of the plurality of V-to-I converters, and wherein each multi-input current detector compares at least one of the V-to-I converter outputs to a threshold value to determine an anomalous current; and
wherein each multi-input detector outputs a logic signal for each of the inputs, each output of the multi-input current detector is coupled to the input of an OR gate.
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Abstract
Systems and methods for cell anomaly detection are provided. The disclosed systems and methods of cell anomaly detection may use a single circuit to detect both cell-open and imbalance conditions. Disclosed embodiments may incorporate a continuous or a sampled time system (i.e. cell anomaly detection is performed when an enable signal is active). An example embodiment includes receiving voltages of a plurality of cells of a battery pack; converting the received voltages to currents; determining a maximum current of the currents; determining whether at least one of the currents is anomalous; and reporting the at least one anomalous current as indicative of a bad cell.
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Citations
17 Claims
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1. A system comprising:
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a plurality of voltage to current (V-to-I) converters each being couplable to one of a respective plurality of cells; a cell detector circuit coupled to each of the plurality of V-to-I converters to receive a current generated by its respective V-to-I converter, wherein the cell detector circuit compares each of the respective plurality of cells with other cells in the plurality of cells by determining a maximum current input to the converters and which cell provides that maximum current to determine if any of the plurality of V-to-I converters provides an anomalous input current and determines which of the plurality of V-to-I converters provides the anomalous input current whereby relative performance between the cells is determined, wherein the cell detector circuit further comprises a plurality of multi-input current detectors, wherein each of the plurality of multi-input current detectors is coupled to each of the plurality of V-to-I converters, and wherein each multi-input current detector compares at least one of the V-to-I converter outputs to a threshold value to determine an anomalous current; and
wherein each multi-input detector outputs a logic signal for each of the inputs, each output of the multi-input current detector is coupled to the input of an OR gate. - View Dependent Claims (2, 3, 4, 5)
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6. A battery pack comprising:
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a plurality of cells; a plurality of high-value resistor dividers, each high-value resistor divider coupled across one cell of the plurality of cells; a plurality of multi-input current detectors, each multi-input current detector coupled to at least one of a plurality of dividers for one cell of the plurality of cells, the multi-input current detector determining the maximum current input to the detectors and which cell provides maximum current and including a current comparator which compares each of the plurality of cells with other cells in the plurality of cells, wherein each of the plurality of multi-input current detectors is coupled to each of the plurality of V-to-I converters, and wherein each multi-input current detector compares at least one of the V-to-I converter outputs to a threshold value to determine an anomalous current; and
wherein each multi-input detector outputs a logic signal for each of the inputs, each logic signal being coupled to the input of an OR gate fordetermining which cell of the plurality of cells is in a fault condition. - View Dependent Claims (7, 8, 9, 10, 11, 12)
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13. A method comprising:
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receiving voltages across the cells of a plurality of cells of a battery pack; converting the received voltages to currents; data processing the currents to compare each of the plurality of cells with other cells in the plurality of cells by amplifying one of the currents; comparing each of the currents to a predetermined reference current; producing a logic level signal for each current based on the comparing; and inverting the logic level signal for the current that was amplified; determining a maximum current input to the converters and which cell provides that maximum current to determine whether at least one of the currents is anomalous; and reporting the at least one anomalous current as indicative meeting a failure criterion. - View Dependent Claims (14, 15)
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16. A method comprising:
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receiving voltages across the cells of a plurality of cells of a battery pack; converting the received voltages to currents; data processing the currents to compare each of the plurality of cells with other cells in the plurality of cells; determining a maximum current input to the converters and which cell provides that maximum current to determine whether at least one of the currents is anomalous; and reporting the at least one anomalous current as indicative meeting a failure criterion, wherein the step of data processing the currents further comprises; amplifying all but one of the currents; comparing each of the currents to a predetermined reference current; producing a logic level signal for each current based on the comparing; and inverting the logic level signal for the current that was not amplified. - View Dependent Claims (17)
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Specification