Power management integrated circuit using a flexible script-based configurator and method for power management

• US 9,092,217 B2
• Filed: 04/06/2011
• Issued: 07/28/2015
• Est. Priority Date: 04/06/2011
• Status: Active Grant

• Current Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Original Assignee: Integrated Device Technology Incorporated (Renesas Electronics Corporation)
• Inventors: Zhai, Shubing, Jiang, Hanbing, Ma, Fei
• Primary Examiner(s): Lee, Thomas
• Assistant Examiner(s): CASSITY, ROBERT A
• Application Number:
  US13/127,211
• Publication Number:
  US 20120260109A1
• Time in Patent Office: 1,574 Days
• Field of Search: 713/300, 713/324
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode

Abstract

A power management integrated circuit incorporates (a) a microprocessor; (b) a non-volatile memory accessible by the microprocessor for storing programs executable by the microprocessor; (c) a random access memory accessible by the microprocessor; (d) an external interface which allows an external device to communicate with the power management integrated circuit; and (e) power regulators providing regulated output voltages from the power management integrated circuit, each power regulator being controllable by the microprocessor and the external interface over the register-controlled bus. A second external interface may be provided, which is used to provide a configuration file descriptive of power requirements of a system in which the power management integrated circuit is deployed. Such a system may include a system-on-a-chip (SOC) integrated circuit. Initially, the microprocessor of the power management integrated circuit executes a power sequence to provide the power-up power supply voltages to the SOC integrated circuit. Thereafter, the SOC integrated circuit controls power-up sequences for the peripheral devices. The configuration file is derived from a script file that is editable by a text editor or a word processor. The script file may be based on a scripting language that allows specifying control of the power regulators of the power management integrated circuit.

Claims

1. A power management integrated circuit, comprising:

a microprocessor;

a non-volatile memory accessible by the microprocessor for storing programs executable by the microprocessor;

a random access memory accessible by the microprocessor; and

a plurality of power regulators providing a plurality of regulated output voltages from the power management integrated circuit, each power regulator being coupled to a register-controlled bus and thereby to the microprocessor and at least one power regulator providing a regulated output voltage to an external device, and wherein an external interface allows the external device to directly communicate through the register-controlled bus to the plurality of power regulators such that each power regulator is controllable by the microprocessor and the external device over the register-controlled bus,

wherein the microprocessor accesses a scripted configuration file descriptive of power requirements of a system in which the power management integrated circuit is deployed,

wherein each of the plurality of power regulators is provided a register address and the microprocessor and the external device control register contents sent to the register address through the register-controlled bus; and

wherein the microprocessor controls the plurality of power regulators during a power-up sequence of the external device, and the external device controls the plurality of power regulators after the power-up sequence.

2. The power management integrated circuit of claim 1, wherein the external interface comprises a serial interface.

3. The power management integrated circuit of claim 2, wherein the serial interface comprises an I2C interface.

4. The power management integrated circuit of claim 1, further comprising a second external interface for providing the scripted configuration file.

5. The power management integrated circuit of claim 4, wherein the system comprises a system-on-a-chip (SOC) integrated circuit.

6. The power management integrated circuit of claim 5, wherein a power sequence executed by the microprocessor provides the power-up power supply voltages to the SOC integrated circuit.

7. The power management integrated circuit of claim 6, wherein the system further comprises peripheral devices, and wherein the SOC integrated circuit controls power-up sequences for the peripheral devices.

8. The power management integrated circuit of claim 4, wherein the scripted configuration file is based on a scripting language that allows specifying control of the power regulators of the power management integrated circuit.

9. The power management integrated circuit of claim 8, wherein the scripting language comprises commands that allow specifying a power-up condition for each of the power regulators.

10. The power management integrated circuit of claim 9, wherein the power-up condition comprises one or more of checking the value of the register representing a power regulator, checking the value of a bit of the register representing the power regulator, waiting a specified time period, waiting for a bit of the register representing the power regulator to be set or cleared, and waiting for an interrupt external or internal to the power management integrated circuit.

11. A method comprising:

(a) providing in a power management integrated circuit;

a microprocessor;

a non-volatile memory accessible by the microprocessor for storing programs executable by the microprocessor;

a random access memory accessible by the microprocessor; and

a plurality of power regulators providing a plurality of regulated output voltages from the power management integrated circuit, each power regulator coupled to a register-controlled bus, at least one power regulator providing a regulated output voltage to an external device, wherein each of the plurality of power regulators is provided a register address and the microprocessor executes scripts to control register contents sent to the register address through the register controlled bus;

an external interface that allows the external device to directly communicate with each power regulator through the register-controlled bus; and

(b) controlling each power regulator by the microprocessor and the external device over the register-controlled bus, wherein the microprocessor controls each power regulator during a power-up sequence of the external device, and the external device controls each power regulator after the power-up sequence.

12. The method of claim 11, wherein the external interface comprises a serial interface.

13. The method of claim 12, wherein the serial interface comprises an I2C interface.

14. The method of claim 11, further comprising:

providing a second external interface in the power management integrated circuit; and

loading a configuration file into the random access memory, the configuration file being descriptive of power requirements in a system in which the power management integrated circuit is deployed.

15. The method of claim 14, wherein the system comprises a system-on-a-chip (SOC) integrated circuit.

16. The method of claim 15, further comprising executing a power sequence in the microprocessor to provide the power-up power supply voltages to the SOC integrated circuit.

17. The method of claim 16, wherein the system further comprises peripheral devices, the method further comprising controlling power-up sequences for the peripheral devices through the SOC integrated circuit.

18. The method of claim 14, wherein the configuration file is derived from a script file that is editable by a text editor or a word processor.

19. The method of claim 18, wherein the script file is based on a scripting language that allows specifying control of the power regulators of the power management integrated circuit.

20. The method of claim 19, further comprising providing in the scripting language commands that allow specifying a power-up condition for each of the power regulators.

21. The method of claim 20, wherein the power-up condition comprises one or more of checking the value of the register representing a power regulator, checking the value of a bit of the register representing the power regulator, waiting a specified time period, waiting for a bit of the register representing the power regulator to be set or cleared, and waiting for an interrupt external or internal to the power management integrated circuit.