Power failure tolerant cryptographic erase

• US 9,092,370 B2
• Filed: 12/19/2013
• Issued: 07/28/2015
• Est. Priority Date: 12/03/2013
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Enterprise IP LLC (Western Digital Corporation)
• Inventors: Schmier, Jacob, Dancho, Mark, Jones, Ryan
• Primary Examiner(s): Mehedi, Morshed
• Application Number:
  US14/135,256
• Publication Number:
  US 20150154121A1
• Time in Patent Office: 586 Days
• Field of Search: 713/193
• US Class Current: 1/1
• CPC Class Codes: G06F 11/00 Error detection; Error correction; Monitoring error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00
• CPC Class Codes: G06F 11/0751 Error or fault detection not based on redundancy power supply failures G06F1/30; network fault management H04L41/06
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/3058 Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations thermal management in cooling arrangements of a computing system G06F1/206
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 21/60 Protecting data
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 2221/2143 Clearing memory, e.g. to prevent the data from being stolen
• CPC Class Codes: G06F 3/0623 in relation to content
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0673 Single storage device

Abstract

The various implementations described herein include systems, methods and/or devices used to enable power failure tolerant cryptographic erasure in a storage device having a first encryption key established as a current encryption key. The method includes performing a set of first stage operations including selecting first and second sets of memory blocks and obtaining a second encryption key. The method includes performing a set of second stage operations including storing, in the first set of memory blocks, first and second sets of metadata, encrypted using the second encryption key. The method includes performing a set of third stage operations, including storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key. The method includes setting the second encryption key as the current encryption key for the plurality of memory blocks.

Claims

1. A method of cryptographically erasing data in a storage device, at a controller of the storage device, the storage device having a first encryption key established as a current encryption key prior to performance of the method, the method comprising:

updating a durably stored progress indicator to indicate a first stage;

performing a set of first stage operations, including;

obtaining a second encryption key;

in accordance with a determination that a power fail condition did not occur while the progress indicator indicates the first stage;

updating the progress indicator to indicate a second stage;

performing a set of second stage operations, including;

storing, in a first set of memory blocks on the storage device, a first set of metadata corresponding to the first set of memory blocks, encrypted using the second encryption key; and

storing, in the first set of memory blocks, a second set of metadata corresponding to a second set of memory blocks on the storage device, encrypted using the second encryption key;

wherein the second set of memory blocks does not comprise any memory block in the first set of memory blocks; and

,

in accordance with a determination that a power fail condition did not occur while the progress-counter indicates the second stage;

updating the progress indicator to indicate a third stage;

performing a set of third stage operations, including storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key; and

subsequent to storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key, setting the second encryption key as the current encryption key for the plurality of memory blocks.

2. The method of claim 1, further comprising:

in accordance with a determination that a power fail condition occurred while the progress indicator indicates the first stage, repeating performance of the first stage operations.

3. The method of claim 1, further comprising:

in accordance with a determination that a power fail condition occurred while the progress indicator indicates the second stage, repeating performance of the second stage operations.

4. The method of claim 1, further comprising:

in accordance with a determination that a power fail condition occurred while the progress indicator indicates the third stage, repeating performance of the third stage operations.

5. The method of claim 1, including, prior to storing, in the first set of memory blocks, the second set of metadata encrypted using the second encryption key:

decrypting the second set of metadata using the first encryption key; and

encrypting the second set of metadata using the second encryption key.

6. The method of claim 1, wherein the second stage operations include durably storing information identifying the first set of memory blocks.

7. The method of claim 1, wherein setting the second encryption key as the current encryption key for the plurality of memory blocks includes rendering the first encryption key unusable.

8. The method of claim 1, wherein obtaining a second encryption key includes:

encrypting the second encryption key; and

durably storing the encrypted second encryption key.

9. The method of claim 1, including selecting the first set of memory blocks from a plurality of memory blocks on the storage device by selecting memory blocks with the fewest erase cycles, memory blocks with fastest read or write times, or a first available set of memory blocks.

10. The method of claim 1, further comprising, subsequent to storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key, erasing at least a portion of the first set of memory blocks and storing, in the erased portion of the first set of memory blocks, the first set of metadata encrypted using the second encryption key.

11. A method of cryptographically erasing data in a storage device having a first set of memory blocks and a second set of memory blocks, wherein the second set of memory blocks does not comprise any memory block in the first set of memory blocks, the first set of memory blocks storing a first set of metadata and the second set of memory blocks storing a second set of metadata, the storage device further having a first encryption key established as a current encryption key, to encrypt metadata and data, if any, in at least the first and second sets of memory blocks, prior to performance of the method, the method comprising:

performing a power-failure tolerant cryptographic erase operation, including;

obtaining and storing a second encryption key;

storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key;

subsequent to storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key, storing the second set of metadata encrypted with the second encryption key at corresponding locations in the second set of memory blocks;

storing the first set of metadata encrypted with the second encryption key in the first set of memory blocks; and

establishing the second encryption key as the current encryption key to encrypt metadata and data, if any, in at least the first and second sets of memory blocks,

wherein performing the cryptographic erase operation further comprises;

storing in non-volatile memory a progress indicator that indicates a stage of the cryptographic erase operation, and updating the progress indicator upon completion of each stage of a predefined set of stages of the cryptographic erase operation;

determining whether a power failure has occurred while performing the cryptographic erase operation; and

,

in accordance with a determination that a power failure has occurred while performing the cryptographic erase operation, resuming performance of the cryptographic erase operation at a stage corresponding to a value of the progress indicator.

21. The method of claim 11, wherein performing the power-failure tolerant cryptographic erase operation includes:

erasing data stored in the first set of memory blocks prior to storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key; and

erasing data stored in the second set of memory blocks prior to storing the second set of metadata encrypted with the second encryption key at corresponding locations in the second set of memory blocks.

22. The method of claim 21, wherein the first set of memory blocks and the second set of memory blocks are non-volatile memory blocks.

12. A storage device, comprising:

an interface for coupling the storage device to a host system; and

a controller having one or more processors, the controller configured to;

update a durably stored progress indicator to indicate a first stage;

perform a set of first stage operations, including;

obtain a second encryption key;

in accordance with a determination that a power fail condition did not occur while the progress indicator indicates the first stage;

update the progress indicator to indicate a second stage;

perform a set of second stage operations, including;

store, in a first set of memory blocks on the storage device, a first set of metadata corresponding to the first set of memory blocks, encrypted using the second encryption key; and

store, in the first set of memory blocks, a second set of metadata corresponding to a second set of memory blocks on the storage device, encrypted using the second encryption key, wherein the second set of memory blocks does not comprise any memory block in the first set of memory blocks; and

,

in accordance with a determination that a power fail condition did not occur while the progress-counter indicates the second stage;

update the progress indicator to indicate a third stage;

perform a set of third stage operations, including storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key; and

,

subsequent to storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key, set the second encryption key as the current encryption key for the plurality of memory blocks.

13. The storage device of claim 12, wherein the controller is further configured to:

in accordance with a determination that a power fail condition occurred while the progress indicator indicates the first stage, repeat performance of the first stage operations.

14. The storage device of claim 12, wherein the controller is further configured to:

in accordance with a determination that a power fail condition occurred while the progress indicator indicates the second stage, repeat performance of the second stage operations.

15. The storage device of claim 12, wherein the controller is further configured to:

in accordance with a determination that a power fail condition occurred while the progress indicator indicates the third stage, repeat performance of the third stage operations.

16. The storage device of claim 12, wherein the second stage operations include durably storing information identifying the first set of memory blocks.

17. The storage device of claim 12, wherein the controller is further configured to render the first encryption key unusable.

18. The storage device of claim 12, wherein the controller is further configured to select, as the first set of memory blocks, memory blocks with the fewest erase cycles, memory blocks with fastest read or write times, or a first available set of memory blocks.

19. The storage device of claim 12, wherein the controller is further configured to, subsequent to storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key, erase at least a portion of the first set of memory blocks and store, in the erased portion of the first set of memory blocks, the first set of metadata encrypted using the second encryption key.

20. A non-transitory computer readable storage medium, storing one or more programs for execution by one or more processors of a storage device, the one or more programs including instructions for:

updating a durably stored progress indicator to indicate a first stage;

performing a set of first stage operations, including;

obtaining a second encryption key;

in accordance with a determination that a power fail condition did not occur while the progress indicator indicates the first stage;

updating the progress indicator to indicate a second stage;

performing a set of second stage operations, including;

storing, in a first set of memory blocks on the storage device, a first set of metadata corresponding to the first set of memory blocks, encrypted using the second encryption key; and

storing, in the first set of memory blocks, a second set of metadata corresponding to a second set of memory blocks on the storage device, encrypted using the second encryption key, wherein the second set of memory blocks does not comprise any memory block in the first set of memory blocks; and

,

in accordance with a determination that a power fail condition did not occur while the progress-counter indicates the second stage;

updating the progress indicator to indicate a third stage;

performing a set of third stage operations, including storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key; and

subsequent to storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key, setting the second encryption key as the current encryption key for the plurality of memory blocks.

23. A storage device, comprising:

a plurality of memory blocks including a first set of memory blocks and a second set of memory blocks, wherein the second set of memory blocks does not comprise any memory block in the first set of memory blocks, the first set of memory blocks storing a first set of metadata and the second set of memory blocks storing a second set of metadata;

an interface for coupling the storage device to a host system; and

a controller having one or more processors, an encryption module, and a first encryption key established as a current encryption key, the controller configured to perform a power-failure tolerant cryptographic erase operation to erase data stored in the storage device by;

obtaining and storing a second encryption key;

storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key;

subsequent to storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key, storing the second set of metadata encrypted with the second encryption key at corresponding locations in the second set of memory blocks;

storing the first set of metadata encrypted with the second encryption key in the first set of memory blocks; and

establishing the second encryption key as the current encryption key to encrypt metadata and data, if any, in at least the first and second sets of memory blocks,

wherein performing the cryptographic erase operation further comprises;

storing in non-volatile memory a progress indicator that indicates a stage of the cryptographic erase operation, and updating the progress indicator upon completion of each stage of a predefined set of stages of the cryptographic erase operation;

determining whether a power failure has occurred while performing the cryptographic erase operation; and

in accordance with a determination that a power failure has occurred while performing the cryptographic erase operation, resuming performance of the cryptographic erase operation at a stage corresponding to a value of the progress indicator.

24. The storage device of claim 23, wherein the controller is further configured to:

erase data stored in the first set of memory blocks prior to storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key; and

erase data stored in the second set of memory blocks prior to storing the second set of metadata encrypted with the second encryption key at corresponding locations in the second set of memory blocks.

25. The storage device of claim 24, wherein the first set of memory blocks and the second set of memory blocks are non-volatile memory blocks.

26. A non-transitory computer readable storage medium, storing one or more programs for execution by one or more processors of a storage device, the storage device having a plurality of memory blocks including a first set of memory blocks and a second set of memory blocks, wherein the second set of memory blocks does not comprise any memory block in the first set of memory blocks, the one or more programs including instructions for performing a power-failure tolerant cryptographic erase operation to erase data stored in the storage device by:

accessing, in the storage device, data previously encrypted using a first encryption key;

obtaining and storing a second encryption key;

storing, in the first set of memory blocks, a first set of metadata corresponding to the first set of memory blocks, encrypted using the second encryption key; and

storing, in the first set of memory blocks, a second set of metadata corresponding to the second set of memory blocks, encrypted using the second encryption key;

subsequent to storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key, storing the second set of metadata encrypted with the second encryption key at corresponding locations in the second set of memory blocks;

storing the first set of metadata encrypted with the second encryption key in the first set of memory blocks; and

establishing the second encryption key as the current encryption key to encrypt metadata and data, if any, in at least the first and second sets of memory blocks,

wherein performing the cryptographic erase operation further comprises;

storing in non-volatile memory a progress indicator that indicates a stage of the cryptographic erase operation, and updating the progress indicator upon completion of each stage of a predefined set of stages of the cryptographic erase operation;

determining whether a power failure has occurred while performing the cryptographic erase operation; and

,

in accordance with a determination that a power failure has occurred while performing the cryptographic erase operation, resuming performance of the cryptographic erase operation at a stage corresponding to a value of the progress indicator.

27. The non-transitory computer readable storage medium of claim 26, wherein the one or more programs further include instructions to:

erase data stored in the first set of memory blocks prior to storing, in the first set of memory blocks, the second set of metadata encrypted with the second encryption key; and

erase data stored in the second set of memory blocks prior to storing the second set of metadata encrypted with the second encryption key at corresponding locations in the second set of memory blocks.

28. The non-transitory computer readable storage medium of claim 27, wherein the first set of memory blocks and the second set of memory blocks are non-volatile memory blocks.

29. A storage device, comprising:

a plurality of memory blocks including a first set of memory blocks and a second set of memory blocks, wherein the second set of memory blocks does not comprise any memory block in the first set of memory blocks;

an interface for coupling the storage device to a host system; and

a controller having one or more processors, an encryption module, and a first encryption key established as a current encryption key, the controller configured to perform a power-failure tolerant cryptographic erase operation to erase data stored in the storage device by;

performing a set of first stage operations, including;

obtaining a second encryption key;

performing a set of second stage operations, including;

erasing data stored in the first set of memory blocks;

storing, in the first set of memory blocks, a first set of metadata corresponding to the first set of memory blocks, encrypted using the second encryption key; and

storing, in the first set of memory blocks, a second set of metadata corresponding to the second set of memory blocks, encrypted using the second encryption key; and

performing a set of third stage operations, including;

erasing data stored in the second set of memory blocks; and

storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key; and

subsequent to storing, in the second set of memory blocks, the second set of metadata encrypted using the second encryption key, setting the second encryption key as the current encryption key for the plurality of memory blocks;

wherein performing the cryptographic erase operation further comprises;

storing in non-volatile memory a progress indicator that indicates a stage of the cryptographic erase operation, and updating the progress indicator upon completion of each stage of a predefined set of stages of the cryptographic erase operation;

determining whether a power failure has occurred while performing the cryptographic erase operation; and

in accordance with a determination that a power failure has occurred while performing the cryptographic erase operation, resuming performance of the cryptographic erase operation at a stage corresponding to a value of the progress indicator.

30. The storage device of claim 29, wherein the first set of memory blocks and the second set of memory blocks are non-volatile memory blocks.