Optoelectronic device and method for manufacturing the same

• US 9,093,605 B2
• Filed: 07/09/2013
• Issued: 07/28/2015
• Est. Priority Date: 12/02/2010
• Status: Active Grant

• Current Assignee: Epistar Corporation
• Original Assignee: Epistar Corporation
• Inventors: Kuo, De Shan, Ko, Tsun Kai
• Primary Examiner(s): Dang, Trung Q
• Application Number:
  US13/937,510
• Publication Number:
  US 20130292720A1
• Time in Patent Office: 749 Days
• Field of Search: 257/94, 438/47
• US Class Current: 1/1
• CPC Class Codes: H01L 31/035227 the quantum structure being quantum wires, or nanorods carbon nanotubes H10K85/211
• CPC Class Codes: H01L 33/0062 for devices with an active region comprising only III-V compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/10 with a light reflecting structure, e.g. semiconductor Bragg reflector
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/145 with a current-blocking structure
• CPC Class Codes: H01L 33/30 containing only elements of Group III and Group V of the Periodic Table
• CPC Class Codes: H01S 2304/12 Pendeo epitaxial lateral overgrowth [ELOG], e.g. for growing GaN based blue laser diodes
• CPC Class Codes: H10K 50/858 comprising refractive means, e.g. lenses

Abstract

An optoelectronic device comprises: a substrate having a first surface and a normal direction perpendicular to the first surface; a first semiconductor formed on the first surface of the substrate, comprising a plurality of hollow components formed in the first semiconductor layer; a first protection layer formed on a sidewall and a bottom wall of the plurality of the hollow components, and the bottom wall comprises a portion of the first surface; and a buffer layer formed on the first semiconductor layer wherein the buffer layer comprises a first surface and a second surface opposite to the first surface.

Claims

1. An optoelectronic device, comprising:

a substrate having a first surface and a normal direction perpendicular to the first surface;

a first semiconductor formed on the first surface of the substrate, comprising a plurality of hollow components formed in the first semiconductor layer;

a first protection layer formed on a sidewall and a bottom wall of the plurality of the hollow components, and the bottom wall comprises a portion of the first surface; and

a buffer layer formed on the first semiconductor layer wherein the buffer layer comprises a first surface and a second surface opposite to the first surface.

2. The optoelectronic device of claim 1, wherein two of the hollow components link into a mesh.

3. The optoelectronic device of claim 2, wherein the plurality of the hollow components is formed as a regular array and an average distance between any two of the hollow components is 10 nm-1.5 μ

m and the porosity of the hollow components is 5-90%.

4. The optoelectronic device of claim 1, further comprising a second semiconductor layer, an active layer, and a third semiconductor layer formed on the second surface of the buffer layer.

5. The optoelectronic device of claim 4, wherein the material of the first semiconductor layer, the second semiconductor layer, the active layer, or the third semiconductor layer contains at least one element selected from the group consisting of Al, Ga, In, As, P, and N.

6. The optoelectronic device of claim 1, wherein the buffer layer comprises an unintentional doped layer, an undoped layer, or an n-type doped layer.

7. The optoelectronic device of claim 1, wherein the material of the first protection layer comprises SiO2, HSQ (Hydrogen silesquioxane), MSQ (Methylsequioxane), and Polymer of silsequioxane.

16. The optoelectronic device of claim 1, wherein the plurality of hollow components is sandwiched between the first surface of the substrate and the first surface of the buffer layer.

18. The optoelectronic device of claim 1, wherein two of the hollow components link into a porous structure.

8. A method of fabricating an optoelectronic device, comprising:

providing a substrate having a first surface and a normal direction perpendicular to the first surface;

forming a first semiconductor layer on the first surface of the substrate;

forming a plurality of hollow components by patterning the first semiconductor layer;

providing a first protection layer to cover a sidewall of the plurality of the hollow components; and

forming a buffer layer on the first semiconductor layer wherein the buffer layer comprise a first surface and a second surface opposite to the first surface;

wherein the method of patterning the first semiconductor layer comprises;

forming an anti-etching layer on the first semiconductor laver;

forming a thin-film metal layer on the anti-etching layer;

forming a plurality of nanoscale metal particles by treating the thin-film metal layer with thermal treatment;

using the plurality of nanoscale metal particles as a mask to pattern the anti-etching layer by anisotropic etching method;

removing the plurality of nanoscale metal particles; and

using the patterned anti-etching layer as a mask to anisotropically etch the first semiconductor layer.

9. The method of fabricating an optoelectronic device of claim 8, wherein two of the hollow components can link into a mesh or porous structure.

10. The method of fabricating an optoelectronic device of claim 8, wherein the plurality of the hollow components is formed as a regular array and an average distance between any two of the hollow components is 10 nm-1.5 μ

m and the porosity of the hollow components is 5-90%.

11. The method of fabricating an optoelectronic device of claim 8, further comprising a second semiconductor layer, an active layer, and a third semiconductor layer formed on the second surface of the buffer layer.

12. The method of fabricating an optoelectronic device of claim 11, wherein the material of the first semiconductor layer, second semiconductor layer, the active layer, or the third semiconductor layer contains at least one element selected from the group consisting of Al, Ga, In, As, P, and N.

13. The method of fabricating an optoelectronic device of claim 8, wherein the buffer layer comprises an unintentional doped layer, an undoped layer, or an n-type doped layer.

14. The method of fabricating an optoelectronic device of claim 8, wherein the first protection layer is formed by the method of spin on glass coating.

15. The method of fabricating an optoelectronic device of claim 8, wherein the material of the first protection layer comprises SiO2, HSQ (Hydrogen silesquioxane), MSQ (Methylsequioxane), and Polymer of silsequioxane.

17. The method of fabricating an optoelectronic device of claim 8, wherein the plurality of hollow components is sandwiched between the first surface of the substrate and the first surface of the buffer layer.