Signal processing circuit, imaging device, and program

• US 9,094,566 B2
• Filed: 11/05/2013
• Issued: 07/28/2015
• Est. Priority Date: 11/12/2012
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Nakasuji, Motohiro, Kawa, Seiji, Oka, Takeshi
• Primary Examiner(s): Tran, Sinh
• Assistant Examiner(s): Monk, Mark
• Application Number:
  US14/072,186
• Publication Number:
  US 20140132809A1
• Time in Patent Office: 630 Days
• Field of Search: 348/265
• US Class Current: 1/1
• CPC Class Codes: H04N 2209/048 having several pick-up sensors
• CPC Class Codes: H04N 2209/049 having three pick-up sensors
• CPC Class Codes: H04N 23/45 for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images
• CPC Class Codes: H04N 23/843 Demosaicing, e.g. interpolating colour pixel values
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements

Abstract

Provided is a signal processing circuit including an image processing unit that performs, at an early stage, a process common to first image signals input using a predetermined number of signal lines in correspondence with first image sensors having a first pixel array and second image signals input using a number of signal lines and commonly used to input the first image signals in correspondence with second image sensors having a second pixel array, and performs specific processes specific to the first and second image signals at a later stage, a conversion unit that converts the second image signals subjected to the specific process according to a format of the first image signals, and a selection unit that selects one of the first image signals subjected to the specific process and the converted second image signals and outputs the selected image signals using the predetermined number of signal lines.

Claims

1. A signal processing circuit comprising:

an image processing unit that performs, at an early stage, a process which is common to first image signals input using a predetermined number of signal lines in correspondence with first image sensors having a first pixel array and second image signals input using a number of signal lines different from the number of signal lines used to input the first image signals and commonly used to input the first image signals in correspondence with second image sensors having a second pixel array different from the first pixel array, and performs specific processes which are specific to the first image signals and the second image signals at a later stage;

a conversion unit that converts the second image signals subjected to the specific process according to a format of the first image signals; and

a selection unit that selects one of the first image signals subjected to the specific process and the converted second image signals and outputs the selected image signals using the predetermined number of signal lines.

2. The signal processing circuit according to claim 1, wherein the image processing unit includes

a common processing unit that performs the process common to the first and second image signals on the first image signals and the second image signals,

a first processing unit that performs a first process on the first image signals subjected to the common process, and

a second processing unit that performs a second process on the second image signals subjected to the common process.

3. The signal processing circuit according to claim 2, wherein the common processing unit changes a level of the first or second image signal by performing a process of multiplying a gain or a process of adding a predetermined value on the first or second image signal output by a specific pixel, and applies signal processing on each channel of the input first or second image signals in order.

4. The signal processing circuit according to claim 3,

wherein the first processing unit performs, as the first process, a process by associating the first image signal output by the specific pixel with the first image signal output by a peripheral pixel of the specific pixel or the first image signal in another channel, and

wherein the second processing unit performs, as the second process, a process by associating the second image signal output by the specific pixel with the second image signal output by a peripheral pixel of the specific pixel or the second image signal in another channel.

5. An imaging device comprising:

a preprocessing unit that performs preprocessing on first image signals output by first image sensors having a first pixel array or second image signals output by second image sensors having a second pixel array different from the first pixel array; and

a signal processing circuit that performs a predetermined process on the first or second image signals subjected to the preprocessing,

wherein the signal processing circuit includes

an image processing unit that performs, at an early stage, a process which is common to the first image signals input using a predetermined number of signal lines in correspondence with the first image sensors and the second image signals input using a number of signal lines different from the number of signal lines used to input the first image signals and commonly used to input the first image signals in correspondence with the second image sensors, and performs specific processes which are specific to the first image signals and the second image signals at a later stage,

a conversion unit that converts the second image signals subjected to the specific process according to a format of the first image signals, and

a selection unit that selects one of the first image signals subjected to the specific process and the converted second image signals and outputs the selected image signals using the predetermined number of signal lines.

6. A program in a non-transitory computer readable medium for causing a computer to execute:

performing, at an early stage, a process which is common to first image signals input using a predetermined number of signal lines in correspondence with first image sensors having a first pixel array and second image signals input using a number of signal lines different from the number of signal lines used to input the first image signals and commonly used to input the first image signals in correspondence with second image sensors having a second pixel array different from the first pixel array, and performs specific processes which are specific to the first image signals and the second image signals at a later stage;

converting the second image signals subjected to the specific process according to a format of the first image signals;

and selecting one of the first image signals subjected to the specific process and the converted second image signals and outputting the selected image signals using the predetermined number of signal lines.