NAND flash based content addressable memory
First Claim
1. A method of operating a non-volatile memory system, comprising:
- receiving on a controller circuit of the memory system a plurality of multi-bit data keys and, for each of the keys, an associated set of data from a host to which the memory system is connected;
forming the data keys into a plurality of data pages, each of the data pages having one or more bits of more than one of the keys, and each of the keys having one or more bits on more than one of the data pages;
writing the data pages into a corresponding plurality of word lines into a first non-volatile memory array of the memory system;
writing the associated sets of data into a second non-volatile memory array of the memory system; and
maintaining by the controller circuit of a mapping between each of the keys and the associated sets of data.
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Accused Products
Abstract
A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. The device can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host.
100 Citations
27 Claims
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1. A method of operating a non-volatile memory system, comprising:
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receiving on a controller circuit of the memory system a plurality of multi-bit data keys and, for each of the keys, an associated set of data from a host to which the memory system is connected; forming the data keys into a plurality of data pages, each of the data pages having one or more bits of more than one of the keys, and each of the keys having one or more bits on more than one of the data pages; writing the data pages into a corresponding plurality of word lines into a first non-volatile memory array of the memory system; writing the associated sets of data into a second non-volatile memory array of the memory system; and maintaining by the controller circuit of a mapping between each of the keys and the associated sets of data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method of operating a non-volatile memory system, comprising:
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receiving on a controller circuit of the memory system a plurality of multi-bit data keys and, for each of the keys, an associated set of data from a host to which the memory system is connected; forming the data keys into a plurality of data pages, each having one or more bits of one or more keys; writing the data pages into a corresponding plurality of word lines into a first non-volatile memory array of the memory system; writing the associated sets of data into a second non-volatile memory array of the memory system; maintaining by the controller circuit of a mapping between each of the keys and the associated sets of data; storing a copy of each of the keys in non-volatile memory on the memory system; for each of the keys, maintaining a correspondence between the copy of the key and the location of the key in the first non-volatile memory array, subsequently receiving a search key from the host; comparing the search key with the data keys as written on the first non-volatile memory array; for those data keys determined to match the search key, determining whether the search key also matches the corresponding copy of the data key; and providing the associated sets of data to the host for those keys whose copies also match the search key. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
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Specification