Communications via shared memory
First Claim
1. A system, comprising:
- a first processing core;
a second processing core, wherein the second processing core is configured to execute a first partition;
a shared memory accessible to the first processing core and to the second processing core, wherein the shared memory includes a first memory area that can be read and written to by the first processing core, wherein the first memory area can be read by the second processing core and cannot be written to by the second processing core, wherein the shared memory includes a second memory area that can be read and written to by the first partition, and wherein the second memory area can be read by the first processing core and cannot be written to by the first processing core; and
a computer-readable storage medium accessible to the first processing core and to the second processing core, wherein the computer-readable medium includes instructions, wherein the instructions are executable by the first processing core to cause the first processing core to;
access a last sampling written buffer in the first memory area to identify a last sampling written memory address of the first memory area in response to determining that sampling data is available at the first processing core, wherein the last sampling written buffer stores a value corresponding to the last sampling written memory address;
determine a first memory address based on the value;
write the sampling data to a memory location identified by the first memory address;
update the last sampling written buffer to indicate a second value corresponding to the first memory address, andwherein the instructions are executable by the second processing core to cause the second processing core while executing the first partition to;
access the last sampling written buffer of the first memory area;
determine, based on the second value, that the sampling data is stored at the memory location identified by the first memory address;
read the sampling data from the memory location identified by the first memory address, wherein the sampling data is read by the first partition without updating a first read counter stored in the second memory area; and
write the sampling data to the second memory area; and
wherein the second processing core is further configured to execute a second partition, wherein the shared memory further includes a third memory area that can be read and written to by the second partition, wherein the third memory area can be read by the first processing core and the first partition and cannot be written to by the first processing core and cannot be written to by the first partition, wherein the second partition can read the first memory area and the second memory area and cannot write to the first memory area and cannot write to the second memory area, and wherein the instructions are executable by the second processing core to cause the second processing core while executing the second partition to;
access the last sampling written buffer of the first memory area;
determine, based on the second value, that the sampling data is stored at the memory location identified by the first memory address;
read the sampling data from the memory location identified by the first memory address, wherein the sampling data is read by the second partition without updating a second read counter stored in the third memory area; and
write the sampling data to the third memory area.
1 Assignment
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Accused Products
Abstract
A first processing core selects a first memory address of a first memory area based on a last written buffer that identifies a last written memory address. The first memory area is a portion of a shared memory, and the first processing core has sole write access to the first memory area among a plurality of processing cores that use the shared memory. Data is written to the first memory address of the first memory area. After writing the data to the first memory address, the last written buffer is updated to designate the first memory address as the last written memory address of the first memory area. A second processing core of the plurality of processing cores is operable to access the data by accessing the last written buffer and determining, based on the last written buffer, that the data is stored at the first memory address.
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Citations
20 Claims
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1. A system, comprising:
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a first processing core; a second processing core, wherein the second processing core is configured to execute a first partition; a shared memory accessible to the first processing core and to the second processing core, wherein the shared memory includes a first memory area that can be read and written to by the first processing core, wherein the first memory area can be read by the second processing core and cannot be written to by the second processing core, wherein the shared memory includes a second memory area that can be read and written to by the first partition, and wherein the second memory area can be read by the first processing core and cannot be written to by the first processing core; and a computer-readable storage medium accessible to the first processing core and to the second processing core, wherein the computer-readable medium includes instructions, wherein the instructions are executable by the first processing core to cause the first processing core to; access a last sampling written buffer in the first memory area to identify a last sampling written memory address of the first memory area in response to determining that sampling data is available at the first processing core, wherein the last sampling written buffer stores a value corresponding to the last sampling written memory address; determine a first memory address based on the value; write the sampling data to a memory location identified by the first memory address; update the last sampling written buffer to indicate a second value corresponding to the first memory address, and wherein the instructions are executable by the second processing core to cause the second processing core while executing the first partition to; access the last sampling written buffer of the first memory area; determine, based on the second value, that the sampling data is stored at the memory location identified by the first memory address; read the sampling data from the memory location identified by the first memory address, wherein the sampling data is read by the first partition without updating a first read counter stored in the second memory area; and write the sampling data to the second memory area; and wherein the second processing core is further configured to execute a second partition, wherein the shared memory further includes a third memory area that can be read and written to by the second partition, wherein the third memory area can be read by the first processing core and the first partition and cannot be written to by the first processing core and cannot be written to by the first partition, wherein the second partition can read the first memory area and the second memory area and cannot write to the first memory area and cannot write to the second memory area, and wherein the instructions are executable by the second processing core to cause the second processing core while executing the second partition to; access the last sampling written buffer of the first memory area; determine, based on the second value, that the sampling data is stored at the memory location identified by the first memory address; read the sampling data from the memory location identified by the first memory address, wherein the sampling data is read by the second partition without updating a second read counter stored in the third memory area; and write the sampling data to the third memory area. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer-implemented method, comprising:
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selecting, by a first processing core, a first memory address of a first memory area based on a last sampling written buffer that identifies a value corresponding to a last sampling written memory address of the first memory area, wherein the first memory area is a portion of a shared memory, wherein the first memory area can be read and written to by the first processing core, and wherein the first memory area can be read by a second processing core and cannot be written to by the second processing core; writing, by the first processing core, sampling data to a memory location identified by the first memory address; and after writing the sampling data, updating the last sampling written buffer to indicate a second value corresponding to the first memory address, executing a first partition on the second processing core, wherein the second processing core, while executing the first partition, is operable to; access the last sampling written buffer; determine, based on the second value, that the sampling data is stored at the memory location identified by the first memory address; read the sampling data from the memory location, wherein the sampling data is read by the first partition without updating a first read counter stored in a second memory area; and write the sampling data to the second memory area, wherein the second memory area is a second portion of the shared memory, wherein the second memory area can be read and written to by the first partition, and wherein the second memory area can be read by the first processing core and cannot be written to by the first processing core, executing a second partition on the second processing core, wherein the second processing core, while executing the second partition, is operable to; access the last sampling written buffer, determine, based on the second value, that the sampling data is stored at the memory location identified by the first memory address, read the sampling data from the memory location identified by the first memory address, wherein the sampling data is read by the second partition without updating a second read counter stored in a third memory area, and write the sampling data to the third memory area of the shared memory, that can be read and written to by the second partition, wherein the third memory area can be read by the first processing core and the first partition and cannot be written to by the first processing core and cannot be written to by the first partition, and wherein the second partition can read the first memory area and the second memory area and cannot write to the first memory area and cannot write to the second memory area. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. A system comprising:
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a shared memory, wherein the shared memory includes a first memory area and a second memory area; a memory management unit that controls read access and write access to the shared memory; a first processing core, wherein the memory management unit allows the first processing core to read and write to the first memory area, wherein the memory management unit allows the first processing core to read the second memory area and does not allow the first processing core to write to the second memory area, and wherein, when sampling data is to be stored by the first processing core, the first processing core; determines a first memory address of the first memory area based on a last written buffer that indicates a value corresponding to a last written memory address of the first memory area; stores the sampling data at a memory location identified by the first memory address of the first memory area; updates the last written buffer to indicate a second value corresponding to the first memory address; accesses a last queuing written buffer in the first memory area to identify a last queuing written memory address of the first memory area in response to determining that queuing data is available, wherein the last queuing written buffer stores a third value corresponding to the last queuing written memory address; determines a second memory address based on the third value; writes the queuing data to a second memory location identified by the second memory address; updates the last queuing written buffer to indicate a fourth value corresponding to the second memory address; and updates a write counter stored in the first memory area; and a second processing core configured to execute a first partition, wherein the memory management unit allows the first partition to read and write to the second memory area, wherein the memory management unit allows the first partition to read the first memory area and does not allow the first partition to write to the first memory area, and wherein the second processing core is operable while executing the first partition to; access the last written buffer of the first memory area; determine, based on the second value, that the sampling data is stored at the memory location identified by the first memory address; read the sampling data from the memory location identified by the first memory address, wherein the sampling data is read by the second processing core without updating a first read counter stored in the second memory area; write the sampling data to the second memory area; access the last queuing written buffer of the first memory area; determine, based on the fourth value, that the queuing data is stored at the second memory location identified by the second memory address; compare the write counter to the first read counter to determine whether new queuing data is available; in response to determining that new queuing data is available, read the queuing data from the memory location identified by the second memory address; in response to reading the queuing data, updating the first read counter; and write the queuing data to the second memory area. - View Dependent Claims (17, 18, 19, 20)
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Specification