Reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device
First Claim
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1. An electronic storage device-enabled method of reducing erase cycles in an electronic storage device that uses non-volatile solid-state memory devices, including erase-limited memory devices that each include a plurality of non-volatile memory cells, the method comprising:
- creating a logical storage unit in one of the non-volatile memory cell, the logical storage unit comprising a first flop that includes at least one flop section, including a first flop section and a second flop section;
wherein the non-volatile solid-state memory devices are configured to reduce erase cycles;
mapping a first address to said first flop;
reading said flop sections from said first flop using a section selection sequence;
storing data associated with said first address in said first flop by writing said data into said first flop section and storing a first value representing said first flop section location into a valid flop section location;
if said data is changed, storing said changed data into said second flop section, assigning said first flop section with an invalid status, storing said changed data in said second flop section, and assigning a valid status to said changed data; and
limiting said data to have a data size that is no more than the flop section size of said at least one flop section.
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Abstract
A solution for reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device is disclosed.
167 Citations
24 Claims
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1. An electronic storage device-enabled method of reducing erase cycles in an electronic storage device that uses non-volatile solid-state memory devices, including erase-limited memory devices that each include a plurality of non-volatile memory cells, the method comprising:
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creating a logical storage unit in one of the non-volatile memory cell, the logical storage unit comprising a first flop that includes at least one flop section, including a first flop section and a second flop section; wherein the non-volatile solid-state memory devices are configured to reduce erase cycles; mapping a first address to said first flop; reading said flop sections from said first flop using a section selection sequence; storing data associated with said first address in said first flop by writing said data into said first flop section and storing a first value representing said first flop section location into a valid flop section location; if said data is changed, storing said changed data into said second flop section, assigning said first flop section with an invalid status, storing said changed data in said second flop section, and assigning a valid status to said changed data; and limiting said data to have a data size that is no more than the flop section size of said at least one flop section. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An apparatus comprising:
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a storage device comprising a memory store that includes at least one non-volatile solid-state memory device, wherein the at least one non-volatile solid-state memory device is an erase-limited memory device; wherein the at least one non-volatile solid-state memory device comprises at least one logical storage unit comprising a flop; wherein the flop comprises a first flop section and second flop section; wherein a first address is mapped to a first flop, a flop block is erased, and a plurality of flop sections are created from the first flop block; and wherein write operations of data associated with the first address is limited to only a flop section that has not been previously used to store said data after initialization of said first flop. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An electronic storage device-enabled method of initializing a logical storage unit for minimizing erase cycles in an electronic storage device, comprising:
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selecting minimum erasable locations that will be used to initialize the logical storage unit, wherein the locations comprises non-volatile memory cells; mapping a primary address to the minimum erasable locations; erasing the minimum erasable locations in a logical storage unit in order to initialize a non-volatile memory cell; calculating or obtaining initialization parameters, and storing the initialization parameters; and initializing a section selection sequence, wherein a first minimum writeable location in an erased minimum erasable location in the section selection sequence is treated as an available flop section. - View Dependent Claims (16)
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17. A computer program product comprising a non-transitory computer usable medium having control logic stored therein for causing a computer to facilitate in initializing a logical storage unit for minimizing erase cycles in an electronic storage device, said control logic comprising:
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selecting minimum erasable locations that will be used to initialize the logical storage unit, wherein the locations comprises non-volatile memory cells; mapping a primary address to the minimum erasable locations; erasing the minimum erasable locations in a logical storage unit in order to initialize a non-volatile memory cell; calculating or obtaining initialization parameters, and storing the initialization parameters; and initializing a section selection sequence, wherein a first minimum writeable location in an erased minimum erasable location in the section selection sequence is treated as an available flop section. - View Dependent Claims (18)
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19. An electronic storage device-enabled method for reducing erase cycles in an electronic storage device, the method comprising:
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initializing a first logical storage unit in a memory device by at least mapping a first address to the first logical storage unit, erasing a first logical storage unit block, and creating a plurality of logical storage unit sections from said first logical storage unit block; and limiting memory device write operations of data associated with the first address to only a logical storage unit section that has not been previously used to store the data after initialization of the first logical storage unit. - View Dependent Claims (20, 21, 22)
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23. A computer program product comprising a non-transitory computer usable medium having control logic stored therein for causing a computer to facilitate in reducing erase cycles in an electronic storage device, said control logic comprising:
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initializing a first logical storage unit in a memory device by at least mapping a first address to the first logical storage unit, erasing a first logical storage unit block, and creating a plurality of logical storage unit sections from said first logical storage unit block; and limiting memory device write operations of data associated with the first address to only a logical storage unit section that has not been previously used to store the data after initialization of the first logical storage unit. - View Dependent Claims (24)
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Specification