Surgical generator and related method for mitigating overcurrent conditions

• US 9,099,863 B2
• Filed: 09/09/2011
• Issued: 08/04/2015
• Est. Priority Date: 09/09/2011
• Status: Active Grant

• Current Assignee: Covidien LP (Medtronic Plc)
• Original Assignee: Covidien LP (Medtronic Plc)
• Inventors: Smith, Robert B., Rupp, Steven C.
• Primary Examiner(s): Evanisko, George
• Application Number:
  US13/228,996
• Publication Number:
  US 20130066311A1
• Time in Patent Office: 1,425 Days
• Field of Search: 606/32, 606/34, 606/35, 606/38, 606/42
• US Class Current: 1/1
• CPC Class Codes: A61B 18/1206 Generators therefor
• CPC Class Codes: A61B 18/1233 with circuits for assuring patient safety
• CPC Class Codes: A61B 18/1402 Probes for open surgery
• CPC Class Codes: A61B 18/1445 at the distal end of a shaft, e.g. forceps or scissors at the end of a rigid rod
• CPC Class Codes: A61B 2018/00642 with feedback, i.e. closed loop control
• CPC Class Codes: A61B 2018/00702 Power or energy
• CPC Class Codes: A61B 2018/00726 Duty cycle
• CPC Class Codes: A61B 2018/00827 Current
• CPC Class Codes: A61B 90/03 Automatic limiting or abutting means, e.g. for safety
• CPC Class Codes: H02H 3/08 responsive to excess current responsive to abnormal temperature caused by excess current H02H5/04

Abstract

A surgical generator and related method for mitigating overcurrent conditions are provided. The surgical generator includes a power supply, a radio frequency output stage, an overcurrent detection circuit in operative communication with an interrupt circuit, and a processor. The power supply generates a power signal and supplies the power signal to the radio frequency output stage. The radio frequency output stage generates a radio frequency signal from the power signal. The overcurrent detection circuit detects an overcurrent of the power signal and/or an overcurrent of the radio frequency signal. The interrupt circuit provides an interrupt signal in response to a detected overcurrent. The processor receives the interrupt signal and supplies a pulse-width modulation signal to the power supply and incrementally decreases the duty cycle of the pulse-width modulation signal in response to the interrupt signal. The radio frequency output stage may be disabled in response to the detected overcurrent.

Claims

1. A method for mitigating overcurrent conditions, comprising the steps of:

supplying a pulse-width modulation signal to a power supply;

generating within the power supply a power signal in response to the pulse-width modulation signal;

supplying the power signal to a radio frequency output stage;

generating within the radio frequency output stage a radio frequency signal from the power signal;

supplying the radio frequency signal to a load;

detecting an overcurrent of at least one of the power signal and the radio frequency signal;

sending an interrupt signal to a processor in response to the detected overcurrent;

disabling the radio frequency output stage in response to the detected overcurrent; and

incrementally decreasing, via the processor, a duty cycle of the pulse-width modulation signal to the power supply in response to the interrupt signal while the duty cycle of the pulse-width modulation signal is above a predetermined low duty cycle.

2. The method according to claim 1, wherein the processor disables the radio frequency output stage in response to the detected overcurrent.

3. The method according to claim 1, wherein disabling the radio frequency output stage in response to the detected overcurrent includes disabling the radio frequency output stage using a cutoff circuit in response to the detected overcurrent.

4. The method according to claim 1, further comprising maintaining, by the processor, the predetermined low duty cycle of the pulse-width modulation signal for at least a predetermined time.

5. The method according to claim 4, further comprising enabling the radio frequency output stage after the predetermined time.

6. The method according to claim 5, further comprising incrementally increasing, via the processor, the duty cycle of the pulse-width modulation signal after the predetermined time.

7. The method according to claim 1, further comprising setting, via an interrupt service routine, a setpoint of a control system to control the power supply to maintain a low duty cycle of the pulse-width modulation signal for at least a predetermined time.

8. The method according to claim 1, further comprising causing the processor to enter into a recovery state or execute an interrupt service routine in response to the interrupt signal.

9. The method according to claim 1, wherein the radio frequency output stage includes two driving transistors coupled to a transformer in a push-pull configuration, and

wherein the disabling of the radio frequency output stage includes disabling driving signals to the two driving transistors.

10. The method according to claim 1, further comprising suspending a dz/dt algorithm in response to the detected overcurrent.