Test coverage of integrated circuits with test vector input spreading

• US 9,103,879 B2
• Filed: 02/27/2013
• Issued: 08/11/2015
• Est. Priority Date: 09/27/2012
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Douskey, Steven M., Fitch, Ryan A., Hamilton, Michael J., Kaufer, Amanda R.
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Vallecillo, Kyle
• Application Number:
  US13/778,812
• Publication Number:
  US 20140089751A1
• Time in Patent Office: 895 Days
• Field of Search: 714/729, 714/30, 714/726, 702/117
• US Class Current: 1/1
• CPC Class Codes: G01R 31/3177 Testing of logic operation, e.g. by logic analysers
• CPC Class Codes: G01R 31/318544 Scanning methods, algorithms and patterns G01R31/3183 takes precedence
• CPC Class Codes: G01R 31/318563 Multiple simultaneous testing of subparts

Abstract

An apparatus and method is provided for switching input pins to scan channels to increase test coverage. In one embodiment, a scan system connects a small number of input pins to several scan channels so that the input pins may be selectively switched. The input pins may transmit independent test vectors to test a large number of test areas on a semiconductor chip. The scan system may include a switching device such as a multiplexer (MUX).

Claims

1. A method for improving test coverage on a plurality of switching devices, a switching device is electrically coupled to a scan chain and to at least two test vector sources and the switching device is controlled by a test mode signal source that provides a plurality of test mode signals to the plurality of switching devices, comprising:

receiving the plurality of test mode signals;

electrically coupling a first schedule of test vector sources to a first scan chain and a second schedule of test vector sources to a second scan chain in response to the plurality of test mode signals,

wherein the first schedule is different than the second schedule throughout the plurality of test mode signals,

wherein the first schedule of test vector sources includes selection of a first test vector source in response to a first test mode signal, and selection of a second test vector source in response to a second test mode signal,

wherein the second schedule of test vector sources includes selection of the second test vector source in response to the first test mode signal, and selection of the first test vector source to the second scan chain in response to a second test mode signal,

wherein the first test mode signal from the plurality of test mode signals causes a first switching device to electrically couple the first test vector source from the first schedule of test vector sources to the first scan chain and, simultaneously, causes a second switching device to electrically couple the second vector source from the second schedule of test vector sources to the second scan chain,

wherein the second test mode signal from the plurality of test mode signals causes the first switching device to electrically couple the second test vector source from the first schedule of test vector sources to the first scan chain and, simultaneously, causes the second switching device to electrically couple the first test vector source from the second schedule of test vector sources to the second scan chain,

wherein the second test vector source is different than the first test vector source,

wherein the first test mode signal for a first switching device from the plurality of switching devices is different within the same time domain from a second test mode signal for a second switching device from the plurality of switching devices; and

receiving a test vector from a test vector source.

2. The method of claim 1, wherein electrically coupling the first schedule of test vector sources to the first scan chain and the second schedule of test vector sources to the second scan chain includes the first scan chain and the second scan chain each receiving a different combination of test vector sources when the switching device cycles through the plurality of test mode signals.

3. The method of claim 1, further comprising:

electrically coupling a third schedule of test vector sources to a third scan chain, wherein the first scan chain, the second scan chain, and the third scan chain each receive a different combination of test vector sources when the switching device cycles through the plurality of test mode signals.

4. The method of claim 1, wherein a number of scan chains is greater than a number of test vector sources.

5. The method of claim 1, wherein at least one of the test vector sources is selectively inverted for every bit of the test vectors from the test vector source.