Method of fabricating a thin film transistor array substrate
First Claim
1. A method of fabricating a thin film transistor array substrate, the method comprising:
- forming a gate electrode on a substrate;
forming a gate insulation film on the substrate on the gate electrode;
forming an active layer on the gate insulation film;
forming an etch stop layer to define a channel region of the active layer;
sequentially forming a barrier layer and a metal layer on the gate insulation film, the active layer, and the etch stop layer; and
forming a source electrode and a drain electrode which are spaced apart from the etch stop layer,wherein the etch stop layer is between the source and drain electrodes, andthe formation of the source and drain electrodes includes;
forming a barrier layer on the entire surface of the substrate provided with the etch stop layer;
forming a metal layer on the barrier layer;
forming a second source electrode layer and a second drain electrode layer by etching the metal layer; and
forming a first source electrode layer and a first drain electrode layer by dry-etching the barrier layer using the second source and drain electrodes as an etching mask, andwherein the source electrode includes the first and second source electrode layers and the drain electrode includes the first and second drain electrode layers.
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Accused Products
Abstract
A thin film transistor array substrate including a gate line and a data line formed on a substrate, the gate and data lines crossing each other; a gate insulation film formed between the gate and data lines; a gate electrode formed at an intersection of the gate and data lines; an active layer formed on the gate insulation film to overlap the gate electrode; an etch stop layer formed on the active layer to define a channel region of the active layer; and a source electrode and a drain electrode formed on the active layer to partially overlap the active layer. The etch stop layer is between the source and drain electrodes, and the source and drain electrodes are spaced apart from the etch stop layer.
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Citations
8 Claims
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1. A method of fabricating a thin film transistor array substrate, the method comprising:
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forming a gate electrode on a substrate; forming a gate insulation film on the substrate on the gate electrode; forming an active layer on the gate insulation film; forming an etch stop layer to define a channel region of the active layer; sequentially forming a barrier layer and a metal layer on the gate insulation film, the active layer, and the etch stop layer; and forming a source electrode and a drain electrode which are spaced apart from the etch stop layer, wherein the etch stop layer is between the source and drain electrodes, and the formation of the source and drain electrodes includes; forming a barrier layer on the entire surface of the substrate provided with the etch stop layer; forming a metal layer on the barrier layer; forming a second source electrode layer and a second drain electrode layer by etching the metal layer; and forming a first source electrode layer and a first drain electrode layer by dry-etching the barrier layer using the second source and drain electrodes as an etching mask, and wherein the source electrode includes the first and second source electrode layers and the drain electrode includes the first and second drain electrode layers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification